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Date:      Sun, 31 Mar 2002 09:52:36 -0800 (PST)
From:      John Polstra <jdp@polstra.com>
To:        smp@freebsd.org
Cc:        dillon@apollo.backplane.com
Subject:   Re: RE: Syscall contention tests return, userret() bugs/issues.
Message-ID:  <200203311752.g2VHqab18408@vashon.polstra.com>
In-Reply-To: <200203311747.g2VHlII89488@apollo.backplane.com>
References:  <XFMail.20020329155622.jhb@FreeBSD.org> <200203292207.g2TM7Fi67491@apollo.backplane.com> <200203311729.g2VHT5h18352@vashon.polstra.com> <200203311747.g2VHlII89488@apollo.backplane.com>

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In article <200203311747.g2VHlII89488@apollo.backplane.com>,
Matthew Dillon  <dillon@apollo.backplane.com> wrote:
> 
> :>     the cache, on IA32, it's write-through to main-memory which
> :>     invalidates all other cpu's caches for that cache line.
> :
> :No, it's not nearly that bad.  See section 9.2 of the IA-32 Intel
> :Architecture Software Developer's Manual, Volume 3 (24547203.pdf from
> :developer.intel.com).  It describes what happens in a couple of
> :different scenarios, for example:
> 
>     This is not a case that typically occurs.  Because intel caches are
>     write-through the processor that does the write will flush the dirty
>     cache line to main memory in fairly short order.

Why do you keep saying the Intel caches are write-through?  They've
been write-back since the Pentium.  See table 9-2 in the same document
I cited before.

John
-- 
  John Polstra
  John D. Polstra & Co., Inc.                        Seattle, Washington USA
  "Disappointment is a good sign of basic intelligence."  -- Chögyam Trungpa


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