Date: Wed, 9 Dec 2009 10:16:26 -0500 From: John Baldwin <jhb@freebsd.org> To: Alexander Motin <mav@freebsd.org> Cc: Perforce Change Reviews <perforce@freebsd.org> Subject: Re: PERFORCE change 171561 for review Message-ID: <200912091016.26737.jhb@freebsd.org> In-Reply-To: <200912091121.nB9BL0Rn082784@repoman.freebsd.org> References: <200912091121.nB9BL0Rn082784@repoman.freebsd.org>
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On Wednesday 09 December 2009 6:21:00 am Alexander Motin wrote: > http://p4web.freebsd.org/chv.cgi?CH=171561 > > Change 171561 by mav@mav_mavtest on 2009/12/09 11:20:05 > > Increase Max Read Request Size for PCIe chips to 1024 bytes. > It gives those slow beasts additional 10% of write bandwidth. We should probably add a method in pci.c to do this ala pci_enable_busmaster(). Several drivers have cut and pasted similar versions of this code that I think it warrants having a common function now. > Affected files ... > > .. //depot/projects/scottl-camlock/src/sys/dev/siis/siis.c#30 edit > > Differences ... > > ==== //depot/projects/scottl-camlock/src/sys/dev/siis/siis.c#30 (text+ko) ==== > > @@ -231,7 +231,20 @@ > siis_resume(device_t dev) > { > struct siis_controller *ctlr = device_get_softc(dev); > + int cap; > + uint16_t val; > > + /* Set PCIe max read request size to at least 1024 bytes */ > + if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) == 0) { > + val = pci_read_config(dev, > + cap + PCIR_EXPRESS_DEVICE_CTL, 2); > + if ((val & PCIM_EXP_CTL_MAX_READ_REQUEST) < 0x3000) { > + val &= ~PCIM_EXP_CTL_MAX_READ_REQUEST; > + val |= 0x3000; > + pci_write_config(dev, > + cap + PCIR_EXPRESS_DEVICE_CTL, val, 2); > + } > + } > /* Put controller into reset state. */ > ctlr->gctl |= SIIS_GCTL_GRESET; > ATA_OUTL(ctlr->r_gmem, SIIS_GCTL, ctlr->gctl); > -- John Baldwin
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