Date: Mon, 14 Dec 2020 22:45:45 +0100 From: =?utf-8?Q?S=C3=B8ren_Schmidt?= <soren.schmidt@gmail.com> To: Emmanuel Vadot <manu@bidouilliste.com> Cc: Ian Lepore <ian@freebsd.org>, freebsd-arm <freebsd-arm@freebsd.org>, Daniel Engberg <daniel.engberg.lists@pyret.net> Subject: Re: FreeBSD-13.0-CURRENT-arm64-aarch64-ROCKPRO64-20201210-7578a4862f0 broken ? Message-ID: <6784D541-8FED-4753-8631-B36886508165@gmail.com> In-Reply-To: <20201213180746.1224166dffb81cb6770ff80d@bidouilliste.com> References: <a9fca4d433dadbe2d1ca490bff3b189a@pyret.net> <4434862ed87c21113fb7f98636fe4694d73856ce.camel@freebsd.org> <0D6FCA87-F101-4AA0-A1BF-6EDBA003BC9F@gmail.com> <87B7940E-119D-4C7F-AB9D-0C78E7F8D3A3@gmail.com> <20201213180746.1224166dffb81cb6770ff80d@bidouilliste.com>
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> On 13 Dec 2020, at 18.07, Emmanuel Vadot <manu@bidouilliste.com> = wrote: >=20 > I have two rockpro64 here. >=20 > The first one was sent to me by Pine when they launched the product > and the other one I received last month. > Both are labeled as v2.1 but the first one was produced opn 2018-06-06 > while the second one was on 2018-07-02 > Both works great and boot 100% of the time. >=20 > But there is indeed some difference in the dram setup. > Boot for the 0606 one : > U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59) > Channel 0: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D15 CS1 Row=3D15 CS=3D2 Die BW=3D16 = Size=3D2048MB > Channel 1: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D15 CS1 Row=3D15 CS=3D2 Die BW=3D16 = Size=3D2048MB > 256B stride > lpddr4_set_rate: change freq to 400000000 mhz 0, 1 > lpddr4_set_rate: change freq to 800000000 mhz 1, 0 >=20 > Boot for the 0702 one : > U-Boot TPL 2020.10 (Dec 10 2020 - 10:13:59) > Channel 0: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB= > Channel 1: LPDDR4, 50MHz > BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB= > 256B stride > lpddr4_set_rate: change freq to 400000000 mhz 0, 1 > lpddr4_set_rate: change freq to 800000000 mhz 1, 0 Same here 0702 version, outputs the exact same probe as yours. > Our u-boot ports doesn't do anything weird so I don't think that your > problem is related to this. > There is a lot of debug info available in > = https://github.com/u-boot/u-boot/blob/master/drivers/ram/rockchip/sdram_rk= 3399.c = <https://github.com/u-boot/u-boot/blob/master/drivers/ram/rockchip/sdram_r= k3399.c> > so maybe try to compile with debug enabled and see if it logs anything > useful ? Went to the official u-boot sources and tried the newest shiniest = 2021.01rc3 and it behaves a little bit better, it will boot 1 out of 3 = times :) Probe looks like this now: U-Boot TPL 2021.01-rc3 (Dec 14 2020 - 23:17:52) Channel 0: LPDDR4, 50MHz BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB Channel 1: LPDDR4, 50MHz BW=3D32 Col=3D10 Bk=3D8 CS0 Row=3D16/15 CS=3D1 Die BW=3D16 Size=3D2048MB 256B stride lpddr4_set_rate: change freq to 400000000 mhz 0, 1 lpddr4_set_rate: change freq to 800000000 mhz 1, 0 The exact same as before. There is no difference in output from the = working boots to the failing ones. I=E2=80=99ll get on with adding some debug to what parameters get set = during memory setup etc. However I have this gut felling it is timing related and my board might = just be too slow/fast for some operation that the ayufan version does = slightly different (it boots every time). Anyhow, when it boots it runs rock stable, it builds worlds etc with no = issues.. -- S=C3=B8ren Schmidt sos@deepcore.dk / sos@freebsd.org "So much code to hack, so little time"
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