Date: Wed, 2 Nov 2016 18:28:08 +0200 From: Konstantin Belousov <kostikbel@gmail.com> To: Jason Harmening <jason.harmening@gmail.com> Cc: freebsd-stable@freebsd.org Subject: Re: huge nanosleep variance on 11-stable Message-ID: <20161102162808.GI54029@kib.kiev.ua> In-Reply-To: <3620f62e-0f4c-2d62-dcf8-e2fdff459250@gmail.com> References: <c88341e2-4c52-ed3c-a469-6446da4415f4@gmail.com> <6167392c-c37a-6e39-aa22-ca45435d6088@gmail.com> <20161102075509.GF54029@kib.kiev.ua> <3620f62e-0f4c-2d62-dcf8-e2fdff459250@gmail.com>
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On Wed, Nov 02, 2016 at 09:18:15AM -0700, Jason Harmening wrote: > I think you are probably right. Hacking out the Intel-specific > additions to C-state parsing in acpi_cpu_cx_cst() from r282678 (thus > going back to sti;hlt instead of monitor+mwait at C1) fixed the problem > for me. But r282678 also had the effect of enabling C2 and C3 on my > system, because ACPI only presents MWAIT entries for those states and > not p_lvlx. You can do the same with "debug.acpi.disabled=mwait" loader tunable without hacking the code. And set sysctl hw.acpi.cpu.cx_lowest to C1 to enforce use of hlt instruction even when mwait states were requested.
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