Date: Sat, 10 Feb 2024 21:22:50 -0800 From: Mark Millard <marklmi@yahoo.com> To: FreeBSD ARM List <freebsd-arm@freebsd.org> Subject: RPi5 PCIe and L1 Substates (and more): implications for using the RasPiOS .dtb (including on the PCIe that has the RP1) Message-ID: <5B4E7F48-CAB9-4A2E-8802-B59AB5EDFBB6@yahoo.com> References: <5B4E7F48-CAB9-4A2E-8802-B59AB5EDFBB6.ref@yahoo.com>
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The RPi5 has in its live dtb (rasPiOS64) and on-disk dtb:
pcie@120000 {
. . .
aspm-no-l0s;
brcm,enable-l1ss;
brcm,enable-mps-rcb;
brcm,vdm-qos-map =3D <0xbbaa9888>;
. . .
I found material indicating that for the brcm,enable-l1ss (L1 Substates,
using a Bidirectional CLKREQ#): "Setting this property only makes sense =
when
the downstream device is L1SS-capable and the OS is configured to =
activate
this mode".
This would seem to potentially mean that use of the RasPiOS dtb =
effectively
requires support of L1 Substates by the OS (or firmware for EDK2?).
Note: pcie@120000 is the one that contains the rpi1 (that, in turn,
has many of the devices).
I found material indicating that aspm-no-l0s means that L0's should be
disabled to avoid signal noise (plus it did not help much for power
savings).
I have not found material about brcm,enable-mps-rcb or brcm,vdm-qos-map =
.
There seem to be a fair number of dma ranges and plain ranges:
dma-ranges =3D <0x2000000 0x0 0x0 0x1f 0x0 0x0 0x400000 0x43000000 0x10 =
0x0 0x0 0x0 0x10 0x0>;
ranges =3D <0x2000000 0x0 0x0 0x1f 0x0 0x0 0xfffffffc 0x43000000 0x4 0x0 =
0x1c 0x0 0x3 0x0>;
Note for the above:
#address-cells =3D <0x3>;
#interrupt-cells =3D <0x1>;
#size-cells =3D <0x2>;
rp1's are:
dma-ranges =3D <0x10 0x0 0x43000000 0x10 0x0 0x10 0x0 0xc0 0x40000000 =
0x2000000 0x0 0x0 0x0 0x400000 0x0 0x0 0x2000000 0x10 0x0 0x10 0x0>;
ranges =3D <0xc0 0x40000000 0x2000000 0x0 0x0 0x0 0x400000>;
Note for the above:
#address-cells =3D <0x2>;
#interrupt-cells =3D <0x2>;
#size-cells =3D <0x2>;
Both usb@200000 and usb@300000 have:
snps,axi-pipe-limit =3D [08];
snps,dis_rxdet_inp3_quirk;
snps,tx-max-burst-prd =3D <0x8>;
snps,tx-thr-num-pkt-prd =3D =
<0x2>;
usb3-lpm-capable;
"axi-pipe-limit" suggests that axi places some of its own constraints
on what usb style-of-usage is valid.
There are no xhci@ . . . in the dtb's.
axi contains all 3 pcie@*'s and has:
axi {
#address-cells =3D <0x2>;
#size-cells =3D <0x2>;
compatible =3D "simple-bus";
dma-ranges =3D <0x0 0x0 0x0 0x0 0x10 0x0 0x10 0x0 0x10 =
0x0 0x1 0x0 0x14 0x0 0x14 0x0 0x4 0x0 0x18 0x0 0x18 0x0 0x4 0x0 0x1c 0x0 =
0x1c 0x0 0x4 0x0>;
phandle =3D <0xae>;
ranges =3D <0x0 0x0 0x0 0x0 0x10 0x0 0x10 0x0 0x10 0x0 =
0x1 0x0 0x14 0x0 0x14 0x0 0x4 0x0 0x18 0x0 0x18 0x0 0x4 0x0 0x1c 0x0 =
0x1c 0x0 0x4 0x0>;
=3D=3D=3D
Mark Millard
marklmi at yahoo.com
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