Date: Wed, 21 Jun 2023 18:11:11 +0200 From: Emmanuel Vadot <manu@bidouilliste.com> To: titus <titus@edc.ro> Cc: freebsd-arm@freebsd.org Subject: Re: h616 clocks Message-ID: <20230621181111.9dbea700d04fee21fbe2ed64@bidouilliste.com> In-Reply-To: <C52AEC69-088A-45F9-924E-CBE7380FA957@edc.ro> References: <E44D2C76-2FD5-4DE3-9111-3BEB508755E0@edc.ro> <20230621155551.5c6a2db2ad87c08c7d2ec7f2@bidouilliste.com> <C52AEC69-088A-45F9-924E-CBE7380FA957@edc.ro>
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On Wed, 21 Jun 2023 18:59:15 +0300 titus <titus@edc.ro> wrote: > Thanks for the answer.=20 > the line was ?adjusted? copied from the linux driver=20 Ah ok, I understand now. > im not sure which clocks are mandatory to have a h616 board working (uart= , sdmmc, usb, ethernet will suffice)=20 > i just saw that there are more clocks in the linux driver than in the fre= ebsd h6 driver but probably the ones defined for h6 in freebsd will suffice= for my goal Yes I didn't do a full blown clock support at the time and I think that the same clocks should be enough to have the peripherals that you want. > i do not have a h616 board yet but i will get one in several days and i h= opefully can test > its not quite a development board but an android tv box which should have= the uart pins/pads exposed on the mb so i can hook the serial uart wires Keep us posted and if you have patches please submitted them to phabricator and add the ARM64 group as reviewer so I'll be notified. Cheers, >=20 > > On Jun 21, 2023, at 4:55 PM, Emmanuel Vadot <manu@bidouilliste.com> wro= te: > >=20 > >=20 > > Hello Titus, > >=20 > > On Wed, 21 Jun 2023 10:58:17 +0300 > > titus <titus@edc.ro> wrote: > >=20 > >> I?m trying to add support for allwinner H616 ccu > >> I downloaded H616 user manual and i mostly can figure out differences = from allwinner H6 but i have a question > >> how is the CCU_GATE clock parent assigned to a specifc ccu gate - ther= e is no indication in the manual > >=20 > > There is, you need to look at the system bus tree (page 90 for the H6 > > and page 46 for the H616). > >=20 > >> for example=20 > >> CCU_GATE(CLK_BUS_DE, "bus-de", "psi-ahb1-ahb2", 0x60c, 0) > >> the manual says that > >> 0x060C DE Bus Gating Reset Register (Default Value: 0x0000_0000) has b= it 0 as DE_GATING and bit 16 as DE_RST > >> but why is psi-ahb1-ahb2 chosen as parent ? (can?t find any reference = in the manual) > >=20 > > No idea where you got this example as we don't have this clock defined > > in FreeBSD so a bit hard to answer to this specific example. > > But indeed that looks correct as the DE engine sits on the PSI2AHB bus > > which is on the PSI bus. > > If you look at page 91 in the H6 user manual you can see that AHB1 and > > AHB2 are both the same clock and equal to the PSI one, which itself is > > created from 4 possible parents (OSC24M, CCU_32K, RC16M and PLL_PERI0) > > and two factors (N and M). > > Clocks can be a bit hard to understand, especially clock topology and > > Allwinner doesn't make it better by not having a full clock topo table > > in their docs usually. So open the doc 3 or 4 times and go back and > > forth reading the clock tree and register definitions. > > Also don't hesitate to ask more questions I'll see if I can help. > >=20 > > Cheers, > >=20 > > --=20 > > Emmanuel Vadot <manu@bidouilliste.com> <manu@freebsd.org> > >=20 > >=20 >=20 >=20 --=20 Emmanuel Vadot <manu@bidouilliste.com> <manu@freebsd.org>
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