Date: Thu, 20 Feb 2014 10:35:54 +0530 From: "Jayachandran C." <c.jayachandran@gmail.com> To: Juli Mallett <jmallett@freebsd.org> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: [RFC] 16K page size for kernel thread stack (patch) Message-ID: <CA%2B7sy7DNTqUhoHBWVMTCGZ7dLTo4%2BeZUMvRJQ8DyBuOcTmy1oA@mail.gmail.com> In-Reply-To: <CACVs6=-y69-BN1s1LOU3NCZpq=B%2BTA_Oqd0spT9yxt7jdqOwFQ@mail.gmail.com> References: <FAC31FA0-26B0-468E-826F-1A17ECA6DA65@FreeBSD.org> <CAJ-VmonLGOGChUohF7E3VBXFSohtAWPcADTxVo=8XreYosNu7A@mail.gmail.com> <EB4E2278-6E09-4495-8A0D-025A3AB4E4C7@freebsd.org> <CAJ-VmomH5SdJersWfeJSfUtTqu=HzjCSiw7E3hchaZAW-rujfA@mail.gmail.com> <DA9E475A-E278-4332-AAB7-2F82B4865E00@FreeBSD.org> <CACVs6=-y69-BN1s1LOU3NCZpq=B%2BTA_Oqd0spT9yxt7jdqOwFQ@mail.gmail.com>
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On Thu, Feb 20, 2014 at 1:19 AM, Juli Mallett <jmallett@freebsd.org> wrote: > On Wed, Feb 19, 2014 at 11:41 AM, Stacey Son <sson@freebsd.org> wrote: >> >> On Feb 18, 2014, at 7:58 PM, Adrian Chadd <adrian@freebsd.org> wrote: >> > I don't think the mips24k/mips74k cores I have support ULRI. >> >> I am starting to wonder which mips CPUs actually do have an ULRI. >> > > Basically-none. Some sources I've read from when the rdhwr approach was > first implemented clearly thought it would pretty much never be implemented > in hardware, and certainly most implementations after it became widespread > didn't implement it, and its use only became common in the recent past. > Until we started using it for TLS, GXemul would exit rather than trap on > the rdhwr. I don't believe I've ever possessed a piece of hardware which > actually implements the register itself, and there's actually a huge > disincentive to do so because a lot of software has been written now which > assumes that rdhwr will always trap and be implemented in software, and so > won't set up the actual hardware register with the right value, breaking > existing software. The Broadcom XLP also has rdhwr (with register 29 implemented). The current emulation we have of rdhwr can be improved quite a bit, I think we should have a handler for reserved exception in the mips exception table and fix up rdhwr without doing full kernel entry/exit. Currently it is routed thru General Exception and trap() JC.
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