Date: Sun, 29 Sep 2013 16:43:28 +0200 From: Warner Losh <imp@bsdimp.com> To: Adrian Chadd <adrian@freebsd.org> Cc: "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org> Subject: Re: [rfc] mips74k/ar9344 support Message-ID: <945A50E4-685D-4CC7-88B5-89278744E389@bsdimp.com> In-Reply-To: <CAJ-VmokBGYYZ1BdghEhYatVBbgH-pNKde-HQXCOfyuR35SrSAA@mail.gmail.com> References: <CAJ-Vmo=pJfPryJ8eEKs7xRMsBUxC=xc2DtZfqsOfLKuXRhredA@mail.gmail.com> <CAJ-VmokBGYYZ1BdghEhYatVBbgH-pNKde-HQXCOfyuR35SrSAA@mail.gmail.com>
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I'd be tempted to use 'sll zero, 3' instead of '.word 0xc0' and define a = macro for it. Why 'sll zero,3' instead of ehb? It allows us to use it on = older MIPS platforms as well... (because it will assemble in other = modes, not for binutils issues)... Speaking of which, I'd also change the last 'nop' on the HAZARD_DELAY = and ITLBNOPFIX to be 'sll zero, 3' as well. This will be an appropriate = nop on older kit, as well as 'fail safe' when someone starts to cope = with newer compilers. Ditto COP0_SYNC. On Sep 29, 2013, at 4:37 PM, Adrian Chadd wrote: > grr, wrong list. >=20 > also, try this: >=20 > = http://people.freebsd.org/~adrian/mips/20130929-mips74k-2.diff<http://peop= le.freebsd.org/~adrian/mips/20130929-mips74k-1.diff> >=20 >=20 >=20 > -adrian >=20 > ---------- Forwarded message ---------- > From: Adrian Chadd <adrian@freebsd.org> > Date: 29 September 2013 04:38 > Subject: [rfc] mips74k/ar9344 support > To: "freebsd-wireless@freebsd.org" <freebsd-wireless@freebsd.org> >=20 >=20 > Hi! >=20 > Here's an initial hacked up patch to get the AR9344 to mountroot> . >=20 > (Which isn't true - it panics due to missing PHY setup on if_arge; = I'll fix > that up soon.) >=20 > http://people.freebsd.org/~adrian/mips/20130929-mips74k-1.diff >=20 > The specific changes: >=20 > * add CPU_MIPS24KC and CPU_MIPS74KC > * mips32r2 CPUs require an EHB as a hazard for things, rather than = NOPs > * mips74k cores have a different CCA (cache coherency attributes) than = the > default - I lifted this from the netbsd mips support. >=20 > now, the ar71xx CPUs are all currently marked as CPU_MIPS4KC. I'll = follow > this up with a commit to change that. There may be things we can = optimise > in the CPU_MIPS24KC case. >=20 > Warner and I have started talking about how to properly fix all of the > hazard handling. We'll discuss that later. >=20 > I'd like to commit this to -HEAD so people wishing to hack on mips74k > platforms can do stuff. Does anyone have any issues with the above? >=20 > Thanks, >=20 >=20 >=20 > -adrian > _______________________________________________ > freebsd-mips@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-mips > To unsubscribe, send any mail to = "freebsd-mips-unsubscribe@freebsd.org"
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