Date: Sat, 14 Dec 1996 03:44:43 -0700 From: Steve Passe <smp@csn.net> To: Erich Boleyn <erich@uruk.org> Cc: Peter Wemm <peter@spinner.dialix.com>, haertel@ichips.intel.com, smp@freebsd.org Subject: Re: TLB shootdown problems? (was -> Re: Tried SMP kernel from early morning CVS tree ) Message-ID: <199612141044.DAA14527@clem.systemsix.com> In-Reply-To: Your message of "Fri, 13 Dec 1996 23:40:27 PST." <E0vYohv-0003dK-00@uruk.org>
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Hi, > Here's a question (I'm going to look this up myself, but thought it'd > be worthwhile to see if you'd shed light on it before I get to it on > my copious spare time ;-) ... > > How exactly are TLB shootdown IPIs implemented? (or are they any > different from any other IPIs?) > > >From what I could see, it looks like the IPI is considered "finished" > (and the function returns) when the APIC status is "delivered". This > could be a problem, because the interrupt doesn't necessarily happen > on the other CPU at that point (and it certainly isn't completed at > that point). You really need some other mechanism to tell you that > the operation has completed before you can continue. this is an accurate picture of the current situation. we just send it and "assumme" that things are now 'OK'. We know this isn't correct, its just step one on the way there. It made remarkable improvement on the P5 machines. So I guess the next step is a rendezvous mechanism to control this. If anyone could suggest an effective algorithm for it I could take a whack at programming it. -- Steve Passe | powered by smp@csn.net | FreeBSD
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