Date: Thu, 13 Feb 2020 16:05:43 +0100 From: Ralf Wenk <iz-rpi03@hs-karlsruhe.de> To: Kyle Evans <kevans@freebsd.org> Cc: Andrew Turner <andrew@freebsd.org>, Oleksandr Tymoshenko <gonzo@freebsd.org>, freebsd-arm <freebsd-arm@freebsd.org>, Emmanuel Vadot <manu@freebsd.org> Subject: Re: A investigative hack that makes (for example) head -r356529 boot and operate normally an RPi4B (finally!): protect all armstub8-gic.bin's loaded content from replacement by the kernel Message-ID: <E1j2G3j-000Mzo-Dw@iz-wera-new.HS-Karlsruhe.DE> In-Reply-To: <E1j2FRX-000MyR-1O@iz-wera-new.HS-Karlsruhe.DE> References: <7E7605DC-021D-448A-8459-8EC26BA9836D.ref@yahoo.com> <7E7605DC-021D-448A-8459-8EC26BA9836D@yahoo.com> <E1j2EmR-000Mwm-ID@iz-wera-new.HS-Karlsruhe.DE> <CACNAnaHVYeuoK=4f7XzokpAVjcqd6ovD58-0LdP_vPGjiXQgdw@mail.gmail.com> <E1j2FRX-000MyR-1O@iz-wera-new.HS-Karlsruhe.DE>
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On 2020-02-13 at 15:26 +0100 Ralf Wenk wrote: > On 2020-02-13 at 7:49 -0600 Kyle Evans wrote: > > On Thu, Feb 13, 2020 at 7:43 AM Ralf Wenk <iz-rpi03=40hs-karlsruhe.de= > wrote: > > > > > > On 2020-02-12 at 18:00 -0800 Mark Millard wrote via freebsd-arm: > > > > =5B...=5D > > > > > > > > =23 svnlite diff /usr/src/sys/dev/fdt/fdt_common.c > > > > Index: /usr/src/sys/dev/fdt/fdt_common.c > > > > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > > > > --- /usr/src/sys/dev/fdt/fdt_common.c (revision 357529) > > > > +++ /usr/src/sys/dev/fdt/fdt_common.c (working copy) > > > > =40=40 -485,7 +485,18 =40=40 > > > > > > > > tuples =3D res_len / tuple_size; > > > > reservep =3D (pcell_t *)&reserve; > > > > +=23ifdef __aarch64__ > > > > + //HACK=21=21=21 > > > > + // Reserve the first few pages, for example to > > > > + // preserve armstub8-gic.bin or armstub.bin > > > > + // content. > > > > + mr=5B0=5D.mr_start=3D 0; > > > > + mr=5B0=5D.mr_size=3D 2*4096; > > > > + tuples++; > > > > + for (i =3D 1; i < tuples; i++) =7B > > > > +=23else > > > > for (i =3D 0; i < tuples; i++) =7B > > > > +=23endif > > > > > > > > rv =3D fdt_data_to_res(reservep, addr_cells, size_c= ells, > > > > (u_long *)&mr=5Bi=5D.mr_start, (u_long *)&m= r=5Bi=5D.mr_size); > > > > =40=40 -512,6 +523,11 =40=40 > > > > > > > > root =3D OF_finddevice(=22/reserved-memory=22); > > > > if (root =3D=3D -1) =7B > > > > + // Fail over to checking for and handling memreserv= e, > > > > + // such as for a RPi4B. > > > > + if (0 =3D=3D fdt_get_reserved_regions(reserved,mres= erved)) > > > > + return (0); > > > > + > > > > return (ENXIO); > > > > =7D > > > > > > > > > > I can confirm that with your patch(es) my RPi3 does not freeze any = more > > > when loading mac_ntpd.ko. The patches are applied against r357853M.= An reboot is working again too. > > Have you tested the RPi3 with just this second hunk of patch to > > fallover to memreserve, or is the first hunk definitely required as > > well? >=20 > Good question. I tested both hunks together. > Will try what happens when just applying the second and report back. Here it is: Without the first hunk the system freezes again when loading mac_ntpd.ko.= Also the CPU information during boot for CPUs 1 to 3 looks strange again.= mbox0: mbox response error bcm2835_cpufreq0: can't set clock rate (id=3D8) Release APs...APs not started CPU 0: ARM Cortex-A53 r0p4 affinity: 0 Instruction Set Attributes 0 =3D <CRC32> Instruction Set Attributes 1 =3D <> Processor Features 0 =3D <AdvSIMD,FP,EL3 32,EL2 32,EL1 32,EL0 32= > Processor Features 1 =3D <> Memory Model Features 0 =3D <TGran4,TGran64,SNSMem,BigEnd,16bit ASI= D,1TB=20 PA> Memory Model Features 1 =3D <8bit VMID> Memory Model Features 2 =3D <32bit CCIDX,48bit VA> Debug Features 0 =3D <2 CTX BKPTs,4 Watchpoints,6=20 Breakpoints,PMUv3,Debugv8> Debug Features 1 =3D <> Auxiliary Features 0 =3D <> Auxiliary Features 1 =3D <> CPU 1: (null) (null) r0p0 affinity: 0 CPU 2: (null) (null) r0p0 affinity: 0 CPU 3: (null) (null) r0p0 affinity: 0 WARNING: WITNESS option enabled, expect reduced performance. Ralf
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