Date: Thu, 06 Sep 2001 10:31:24 -0600 From: Warner Losh <imp@harmony.village.org> To: Hiroharu Tamaru <tamaru@myn.rcast.u-tokyo.ac.jp> Cc: FreeBSD-mobile@FreeBSD.ORG Subject: Re: Toshiba Libretto M3 with Planex FNW-3600-T Message-ID: <200109061631.f86GVOh54328@harmony.village.org> In-Reply-To: Your message of "Thu, 06 Sep 2001 15:48:33 %2B0900." <sa6elpk95mm.wl@ring.myn.rcast.u-tokyo.ac.jp> References: <sa6elpk95mm.wl@ring.myn.rcast.u-tokyo.ac.jp> <200109052029.f85KTwh47645@harmony.village.org> <sa6elpmywdf.wl@ring.myn.rcast.u-tokyo.ac.jp> <sa6heui5m2q.wl@ring.myn.rcast.u-tokyo.ac.jp> <sa6itey6deu.wl@ring.myn.rcast.u-tokyo.ac.jp> <200109042357.f84Nvgh39637@harmony.village.org> <200109050545.f855jsh41602@harmony.village.org> <200109051647.f85Glgh45792@harmony.village.org> <200109052145.f85Ljsh48156@harmony.village.org>
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In message <sa6elpk95mm.wl@ring.myn.rcast.u-tokyo.ac.jp> Hiroharu Tamaru writes: : Bingo! This exactly solved my problem too. : I put a sleep 5 in /etc/start_if.ed0 (I changed to ed0 after kernel : rebuild) and every thing works perfectly now. : Thank you so much! I'm happy for you. : So, it was more of the ed driver problem than pcic problem.. I : noticed that sleep 4 is enough after the boot phase is over, but 5 is : necessary if I have the card in while it boots; looks very likely a : network chip init problem, doesn't it? : Should I take this to freebsd-net? for ed folks, maybe? I'd be tempted to go to Ian Dowse <iedowse@freebsd.org> about this. He added the support. : By the way, I found a minor performance issue. I'd ask -net about this. : 44RC-PCI 44RC-ISA 43STABLE : ep0( 10Mbps half dpx) 7.4 7.7 7.5 : ed0(100Mbps full dpx) 8.8 9.1 9.4 : figures are in units of Mbps. These numbers are both within "uncertainty" that I've seen between various measurements. I'm uncertain how tcpblast accounts for these variations, or how many runs you made to come up with these numbers. I am somewhat surprised that the interrupt routing method would have a 0.3Mbps affect (even with interrupt sharing). : I am curious why should it get slower as we evolve from : ISA based, polling -> PCI based, polling -> PCI based, use intr ? : I thought those changes should increase preformance, since it utilizes : more of the recent speeded up hardware.. : : May be I am not understanding the changes from 4.3-stable to this new : PCI code at all, but I mention just because I noticed it. There should be little or no difference between the two methods. Maybe the checking of the bridge for status information is slowing it down slightly. Warner To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-mobile" in the body of the message
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