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Date:      Tue, 6 Aug 2013 19:32:32 -0700 (PDT)
From:      "aseem.jolly" <aseem.jolly@gmail.com>
To:        freebsd-usb@freebsd.org
Subject:   Re: USB DMA memory Allocation
Message-ID:  <1375842752147-5834384.post@n5.nabble.com>
In-Reply-To: <52009EEB.1040404@bitfrost.no>
References:  <1375489015367-5833506.post@n5.nabble.com> <zarafa.51fcc634.4d66.6bc5f4d2757b93c5@mail.lockless.no> <1375551235535-5833585.post@n5.nabble.com> <zarafa.51fe1344.72a4.2c750fca3ae0393f@mail.lockless.no> <1375752286864-5834206.post@n5.nabble.com> <52009EEB.1040404@bitfrost.no>

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I have gone through EHCI specification(was pretty long so couldn't finish it
though) and below is what that I have understood.

"Control Data Structure Segment Register 'CTRLDSSEGMENT', This register
allows the host software to locate all control data structures within the
same 4 Gigabyte memory segment. This 32-bit register corresponds to the most
significant address bits [63:32] for all EHCI data structures. 

If the 64-bit Addressing Capability field in Host controller configuration
parametere register (HCCPARAMS) is set to 1, then 'CTRLDSSEGMENT' register
is used with the link pointers to construct 64-bit addresses to EHCI control
data structures. 
 
This register is concatenated with the link pointer from either the
PERIODICLISTBASE, ASYNCLISTADDR, 
or any control data structure link field to construct a 64-bit address. We
are programming 'CTRLDSSEGMENT' to the default value(00000000h) when we
initialize the host controller(see ehci_init function)"

I believe, we have to still confine us to a 4GB range and not specifially
[0-4GB] range. On host initialization, we can set 'CTRLDSSEGMENT' register
to the lowest address of a particular 4GB range and then the host controller
will be able to locate all ehci data structures with in that segment by
concatenation. We will accordingly adjust the address boundary restrictions
in the parent dma tag.

Could you please confirm once, and let me know if I have not understood it
correctly.



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