Date: Sun, 11 Aug 2013 18:19:39 -0700 (PDT) From: "aseem.jolly" <aseem.jolly@gmail.com> To: freebsd-usb@freebsd.org Subject: Re: USB DMA memory Allocation Message-ID: <1376270379430-5835590.post@n5.nabble.com> In-Reply-To: <5207378A.40804@bitfrost.no> References: <1375489015367-5833506.post@n5.nabble.com> <zarafa.51fcc634.4d66.6bc5f4d2757b93c5@mail.lockless.no> <1375551235535-5833585.post@n5.nabble.com> <zarafa.51fe1344.72a4.2c750fca3ae0393f@mail.lockless.no> <1375752286864-5834206.post@n5.nabble.com> <52009EEB.1040404@bitfrost.no> <1375842752147-5834384.post@n5.nabble.com> <5201E517.3050200@bitfrost.no> <1376189272784-5835461.post@n5.nabble.com> <5207378A.40804@bitfrost.no>
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if (EHCI_HCC_64BIT(cparams)) {
DPRINTF("HCC uses 64-bit structures\n");
/* MUST clear segment register if 64 bit capable */
EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
}
sc->sc_bus.usbrev = USB_REV_2_0;
/* Reset the controller */
DPRINTF("%s: resetting\n", device_get_nameunit(sc->sc_bus.bdev));
err = ehci_hcreset(sc);
Doubt 1) Whats the need to clear 'CTRLDSSEGMENT' register when host
controller reset is going to set it to
default value(0x00000000) anyways. I think we should move this code to after
reset or before we turn on the controller.
Doubt 2) We should be using EOWRITE4(sc, EHCI_CTRLDSSEGMENT, 0); instead of
EWRITE4(sc, EHCI_CTRLDSSEGMENT, 0);
#define EOWRITE4(sc, a, x) \
bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl,
(sc)->sc_offs+(a), (x))
#define EWRITE4(sc, a, x) \
bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
--
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