Skip site navigation (1)Skip section navigation (2)
Date:      Tue, 29 Apr 2014 17:52:21 -0600
From:      Ian Lepore <ian@FreeBSD.org>
To:        Thomas Skibo <ThomasSkibo@sbcglobal.net>
Cc:        freebsd-arm <freebsd-arm@FreeBSD.org>
Subject:   Re: Microzed bug-fix,
Message-ID:  <1398815541.22079.46.camel@revolution.hippie.lan>
In-Reply-To: <53601828.7030800@sbcglobal.net>
References:  <53601828.7030800@sbcglobal.net>

next in thread | previous in thread | raw e-mail | index | archive | help

--=-r7zOGkcStnW0COmiEVzA
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: 7bit

On Tue, 2014-04-29 at 14:22 -0700, Thomas Skibo wrote:
> Hi,
> 
> Another bug-fix.
> 
> Without this, Microzed or any other Zynq board with 1G of memory panics. 
>   It is because of a lack of contiguous virtual space.  I moved the 
> mappings of PSIO devices to increase vm_max_kernel_address.
> 
> I wonder if we'll still have this problem running an ARM board with 2G 
> memory.

There's a newer way to do this, but I didn't do the xilinx stuff when I
set this up last year because I had no way to test it.  The new scheme
lets you declare the physaddr and size of any regions to be
device-mapped, and it dynamically allocates virtual address space for it
from the top down, so device mapping doesn't waste any space.

Please try the attached patch.  The *_VBASE defines are deleted because
those things aren't at a fixed address anymore.  If it's ever necessary
to get a virtual address outside of the bus_space system (like for a
debugging uart) you can call arm_devmap_ptov().

Oh -- I have 2G wandboards that have no trouble with memory.

-- Ian


--=-r7zOGkcStnW0COmiEVzA
Content-Disposition: inline; filename="zynq_devmap.diff"
Content-Type: text/x-patch; name="zynq_devmap.diff"; charset="us-ascii"
Content-Transfer-Encoding: 7bit

Index: sys/arm/xilinx/zy7_machdep.c
===================================================================
--- sys/arm/xilinx/zy7_machdep.c	(revision 265110)
+++ sys/arm/xilinx/zy7_machdep.c	(working copy)
@@ -60,7 +60,7 @@ vm_offset_t
 initarm_lastaddr(void)
 {
 
-	return (ZYNQ7_PSIO_VBASE);
+	return (arm_devmap_lastaddr());
 }
 
 void
@@ -79,39 +79,18 @@ initarm_late_init(void)
 {
 }
 
-#define FDT_DEVMAP_SIZE 3
-static struct arm_devmap_entry fdt_devmap[FDT_DEVMAP_SIZE];
-
 /*
- * Construct pmap_devmap[] with DT-derived config data.
+ * Set up static device mappings.  Not strictly necessary -- simplebus will
+ * dynamically establish mappings as needed -- but doing it this way gets us
+ * nice efficient 1MB section mappings.
  */
 int
 initarm_devmap_init(void)
 {
-	int i = 0;
 
-	fdt_devmap[i].pd_va =	ZYNQ7_PSIO_VBASE;
-	fdt_devmap[i].pd_pa =	ZYNQ7_PSIO_HWBASE;
-	fdt_devmap[i].pd_size = ZYNQ7_PSIO_SIZE;
-	fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	fdt_devmap[i].pd_cache = PTE_DEVICE;
-	i++;
+	arm_devmap_add_entry(ZYNQ7_PSIO_HWBASE, ZYNQ7_PSIO_SIZE);
+	arm_devmap_add_entry(ZYNQ7_PSCTL_HWBASE, ZYNQ7_PSCTL_SIZE);
 
-	fdt_devmap[i].pd_va =	ZYNQ7_PSCTL_VBASE;
-	fdt_devmap[i].pd_pa = 	ZYNQ7_PSCTL_HWBASE;
-	fdt_devmap[i].pd_size = ZYNQ7_PSCTL_SIZE;
-	fdt_devmap[i].pd_prot = VM_PROT_READ | VM_PROT_WRITE;
-	fdt_devmap[i].pd_cache = PTE_DEVICE;
-	i++;
-
-	/* end of table */
-	fdt_devmap[i].pd_va = 0;
-	fdt_devmap[i].pd_pa = 0;
-	fdt_devmap[i].pd_size = 0;
-	fdt_devmap[i].pd_prot = 0;
-	fdt_devmap[i].pd_cache = 0;
-
-	arm_devmap_register_table(&fdt_devmap[0]);
 	return (0);
 }
 
Index: sys/arm/xilinx/zy7_reg.h
===================================================================
--- sys/arm/xilinx/zy7_reg.h	(revision 265110)
+++ sys/arm/xilinx/zy7_reg.h	(working copy)
@@ -44,16 +44,13 @@
 #define ZYNQ7_PLGP1_SIZE	0x40000000
 
 /* I/O Peripheral registers. */
-#define ZYNQ7_PSIO_VBASE	0xE0000000
 #define ZYNQ7_PSIO_HWBASE	0xE0000000
 #define ZYNQ7_PSIO_SIZE		0x00300000
 
 /* UART0 and UART1 */
-#define ZYNQ7_UART0_VBASE	(ZYNQ7_PSIO_VBASE)
 #define ZYNQ7_UART0_HWBASE	(ZYNQ7_PSIO_HWBASE)
 #define ZYNQ7_UART0_SIZE	0x1000
 
-#define ZYNQ7_UART1_VBASE	(ZYNQ7_PSIO_VBASE+0x1000)
 #define ZYNQ7_UART1_HWBASE	(ZYNQ7_PSIO_HWBASE+0x1000)
 #define ZYNQ7_UART1_SIZE	0x1000
 
@@ -63,15 +60,12 @@
 #define ZYNQ7_SMC_SIZE		0x05000000
 
 /* SLCR, PS system, and CPU private registers combined in this region. */
-#define ZYNQ7_PSCTL_VBASE	0xF8000000
 #define ZYNQ7_PSCTL_HWBASE	0xF8000000
 #define ZYNQ7_PSCTL_SIZE	0x01000000
 
-#define ZYNQ7_SLCR_VBASE	(ZYNQ7_PSCTL_VBASE)
 #define ZYNQ7_SLCR_HWBASE	(ZYNQ7_PSCTL_HWBASE)
 #define ZYNQ7_SLCR_SIZE		0x1000
 
-#define ZYNQ7_DEVCFG_VBASE	(ZYNQ7_PSCTL_VBASE+0x7000)
 #define ZYNQ7_DEVCFG_HWBASE	(ZYNQ7_PSCTL_HWBASE+0x7000)
 #define ZYNQ7_DEVCFG_SIZE	0x1000
 

--=-r7zOGkcStnW0COmiEVzA--




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?1398815541.22079.46.camel>