Date: Wed, 6 Mar 96 9:52:53 MET From: Greg Lehey <lehey.pad@sni.de> To: terry@lambert.org (Terry Lambert) Cc: hackers@freebsd.org (Hackers; FreeBSD) Subject: Re: Triton-II support... when? Message-ID: <199603060856.JAA19389@nixpbe.pdb.sni.de> In-Reply-To: <199603052308.QAA09368@phaeton.artisoft.com>; from "Terry Lambert" at Mar 5, 96 4:08 pm
next in thread | previous in thread | raw e-mail | index | archive | help
>>> Will FreeBSD 2.1-RELEASE boot/run on a P5 without the floating point >>> bug? The question is basically a non-sequitur -- there is no function >>> difference in the chipsets except the Triton-II happens to work. >>> >> Are a lot of people running FreeBSD with their Level-2 caches off? > > Not "off"; with writeback disabled (pick "write through in BIOS CMOS, > I believe). > >> As I understand it, there are much more profound changes than simply >> one bug fix. I've been told that Triton-II: >> o adds support for concurrent PCI/ISA bus accesses > > Who uses ISA cards? How many people have really 0 ISA boards in their machine? Considering that ISA places such a load on the bus, it seems a good idea to me. >> o adds support for ECC memory > > Still no parity, eh? 8-). By itself? I don't know. If they have ECC, you'd think that they'd allow you to just use the parity bit. Greg
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199603060856.JAA19389>