Date: Sun, 26 Jul 1998 18:49:38 -0500 (EST) From: "John S. Dyson" <dyson@iquest.net> To: tlambert@primenet.com (Terry Lambert) Cc: dyson@iquest.net, roberto@keltia.freenix.fr, freebsd-current@FreeBSD.ORG Subject: Re: New LINT options: what is VM coloring? Message-ID: <199807262349.SAA05217@dyson.iquest.net> In-Reply-To: <199807262207.PAA18306@usr01.primenet.com> from Terry Lambert at "Jul 26, 98 10:07:33 pm"
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Terry Lambert said: > > > > be a big win for direct-mapped caches (e.g. most Pentium L2 caches), but > > > > loses effectiveness with set-associative caches (e.g. Pentium Pro, which > > > > has a set size of 4). > > > > > > The K6 has a 2-way set associative cache so I guess it is not interesting > > > to use page coloring but does anyone know what kind of L2 cache an ASUS T2P4 > > > use ? It is a P5-class motherboard so it is possible that the cache is > > > direct-mapped, no ? > > > > > David is essentially right. However, the page coloring code (that has > > been in -current for the last >1yr) goes a little too far and colors > > even the 1st level cache (I know -- I did it.) Also, there is the issue > > of proper choice of initial color values, so I used an ad-hoc approach that > > appears to work correctly most of the time. > > Actually, the L1 cache is where it's most important (see paper references > in my previous posting). Also, the Alpha can significantly benefit from > this, per Digital UNIX: > Is the L1 cache on the Alpha is direct mapped??? On the X86, it isn't. When actually running tests, it doesn't seem to make ANY differences on the X86, due to the very small number of pages, and the mapping scheme. -- John | Never try to teach a pig to sing, dyson@iquest.net | it makes one look stupid jdyson@nc.com | and it irritates the pig. To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message
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