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Date:      Fri, 14 Aug 1998 13:43:04 -0600
From:      Warner Losh <imp@village.org>
To:        Olivier Galibert <galibert@pobox.com>
Cc:        hackers@FreeBSD.ORG
Subject:   Re: 64-bit time_t 
Message-ID:  <199808141943.NAA16592@harmony.village.org>
In-Reply-To: Your message of "Fri, 14 Aug 1998 20:12:33 %2B0200." <19980814201233.A8962@loria.fr> 
References:  <19980814201233.A8962@loria.fr>  <199808141115.FAA21672@lariat.lariat.org> <Pine.SGI.3.95.980814091311.18292A-100000@orion.aye.net> <199808141526.JAA23467@lariat.lariat.org> 

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In message <19980814201233.A8962@loria.fr> Olivier Galibert writes:
: I has a  far-from-zero cost on  32bits  architectures, i.e. everything
: short of R8000, R10000, alphas and very recent sparcs.

The R4000 and R5000 (both of which implement MIPS III) are 64 bit as
well.  They have 64 bit instructions[*] and registers.  While it is
true that there is a cost associated with snagging bits from memory or
squirting it back to memory, the cache tends to mitigate these effects
somewhat.

Warner

[*] Meaning instructions that operate on 64 bit quantities.  These are
available even in 32-bit address-mode.  The n32 api makes use of this
to give you everything you could want from n64, without the bloat of
pointers 2x in size.

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