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Date:      Fri, 26 Feb 1999 21:27:14 +0100 (CET)
From:      Søren Schmidt <sos@freebsd.dk>
To:        dcs@newsguy.com (Daniel C. Sobral)
Cc:        sheldonh@iafrica.com, beyssac@enst.fr, grog@lemis.com, freebsd-current@FreeBSD.ORG
Subject:   Re: IDE CDROM not found with PIIX4 chipset, -current kernel
Message-ID:  <199902262027.VAA73138@freebsd.dk>
In-Reply-To: <36D6E315.91969389@newsguy.com> from "Daniel C. Sobral" at "Feb 27, 1999  3: 8:21 am"

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It seems Daniel C. Sobral wrote:
> On the code:
> 
> >                 ireason = inb (ata->port + AR_IREASON);
> >                      ac->result.status = inb (ata->port + AR_STATUS);
> >                      phase = (ireason & (ARI_CMD | ARI_IN)) |
> >      -                       (ac->result.status & ARS_DRQ);
> >      +                       (ac->result.status & (ARS_DRQ|ARS_BSY));
> >                      if (phase == PHASE_CMDOUT)
> >                              break;
> >                      DELAY (10);
> 
> The missing delay is not relevant. (Or, at least, I hope acd is not
> missing delays in wait loops!)
> 
> The problem is the ARS_BSY signal. If my memory doesn't fail me, if
> ARS_BSY is active, then the other signals may contain trash. In this
> particular loop, ARS_BSY could be active, but it wasn't being
> checked for, on the assumption that ARS_DRQ would only be up (down?)
> when the operation completed.

This has been in there for ages, if the PR is still open it should
be closed.

Be patient though, I'm working as much as I can on the (really) new
subsystem, and I hope to release the first snaps soon...

-Søren



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