Date: Mon, 22 Mar 1999 10:34:27 -0800 (PST) From: Matthew Dillon <dillon@apollo.backplane.com> To: Dennis <dennis@etinc.com> Cc: Mike Smith <mike@smith.net.au>, Amancio Hasty <hasty@rah.star-gate.com>, hackers@FreeBSD.ORG Subject: Re: Gigabit ethernet -- what am I doing wrong? Message-ID: <199903221834.KAA21361@apollo.backplane.com> References: <Your message of "Sun, 21 Mar 1999 20:10:21 EST." <199903220058.TAA17538@etinc.com> <199903221711.MAA20551@etinc.com>
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:>This has nothing whatever to do with reality, however. Most PCI
:>peripherals are bus masters, and most memory busses these days are at
:>least 64 bits wide, so 64 bit PCI has very real performance benefits.
:>
:>The processor's internal word size has little or nothing to do with the
:>equation.
:
:The ability to do single-cycle transfers IS affected by the internal
:processor's
:word size. If it can't do sustained single-cycle bursts then performance
:suffers
:significantly, so I disagree wholeheartedly on this. If the on-board processor
:doesnt have a 64bit bus it is very difficult to do single cycle transfers.
:
:Dennis
All PCI card chipsets implement internal read and write
DMA FIFO's. Thus a 64 bit PCI card can easily burst 64 bit
words over the PCI bus. If the processor on the card
itself cannot stuff the FIFO quickly enough to hold the burst
for a period longer then the size of the FIFO, it's no big deal
because the processor on the card can obviously pump data
sufficiently to handle the physical I/O it is supporting for
that card , and the FIFO is large enough such that the
shorter higher-speed burst on the PCI bus will be sufficient
enough to use the PCI bus bandwidth efficiently. What bandwidth
cannot be used by one card will certainly be used by another.
This just isn't an issue.
-Matt
Matthew Dillon
<dillon@backplane.com>
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