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Date:      Mon, 28 Jun 1999 18:56:59 +0800
From:      Peter Wemm <peter@netplex.com.au>
To:        Alan Cox <alc@cs.rice.edu>
Cc:        Terry Lambert <tlambert@primenet.com>, Bakul Shah <bakul@torrentnet.com>, julian@whistle.com, dillon@apollo.backplane.com, freebsd-smp@freebsd.org
Subject:   Re: high-efficiency SMP locks - submission for review 
Message-ID:  <19990628105659.8E8F582@overcee.netplex.com.au>
In-Reply-To: Your message of "Mon, 28 Jun 1999 00:36:39 EST." <19990628003639.N2738@cs.rice.edu> 

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Alan Cox wrote:
> On Mon, Jun 28, 1999 at 05:21:05AM +0000, Terry Lambert wrote:
> > 
> > I also have a slight problem with relying on a test-and-set
> > instruction any more complicated than that which can be
> > implemented with P/V semaphores.  Many processors (e.g. MIPS)
> > don't have an atomic test and set, and you'd want to avoid
> > architecting against them ever working.  8-(.
> > 
> 
> That is true.  They, including MIPS and Alpha, have something
> better:  Load-locked and store conditional.  :-)
> 
> I think this is a non-issue.
> 
> Alan

Actually, I have a bigger issue with it..  cmpxchgl etc doesn't exist on
all x86 cpus.  To make a kernel that boots on the current cpus (including
the 486) we either have to conditionalize the inlines or use the
universally available (and implicitly locked) xchg instruction - but that's
a test-and-set style operation rather than atomic_cmpex.

Cheers,
-Peter



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