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Date:      Tue, 29 Jun 1999 01:18:23 +0800
From:      Peter Wemm <peter@netplex.com.au>
To:        Matthew Dillon <dillon@apollo.backplane.com>
Cc:        Alan Cox <alc@cs.rice.edu>, Terry Lambert <tlambert@primenet.com>, Bakul Shah <bakul@torrentnet.com>, julian@whistle.com, freebsd-smp@freebsd.org
Subject:   Re: high-efficiency SMP locks - submission for review 
Message-ID:  <19990628171823.3445882@overcee.netplex.com.au>
In-Reply-To: Your message of "Mon, 28 Jun 1999 09:11:47 MST." <199906281611.JAA22481@apollo.backplane.com> 

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Matthew Dillon wrote:
> :Actually, I have a bigger issue with it..  cmpxchgl etc doesn't exist on
> :all x86 cpus.  To make a kernel that boots on the current cpus (including
> :the 486) we either have to conditionalize the inlines or use the
> :universally available (and implicitly locked) xchg instruction - but that's
> :a test-and-set style operation rather than atomic_cmpex.
> :
> :Cheers,
> :-Peter
> 
>     My "Intel486 Processor Family" book - note the 486, lists the cmpxchgl
>     instruction.  Of course, I've never actually tried it on a 486.  I dunno
>     whether the 386 implements it, though.

Ahh, right, silly me.  I was thinking of the 8-byte version which is signified
by the CX8 bit in cpuid.

The 386, I doubt has it.  There have been a couple of suggestions for ending
the support for the 386 as it will simplify some ugly code for emulating
kernel-mode write faults etc, but it's never happened.  Apparently the
386 is common in some areas still.

Cheers,
-Peter



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