Date: Mon, 24 Mar 2003 07:57:08 -0500 From: Jake Burkholder <jake@locore.ca> To: Hidetoshi Shimokawa <simokawa@sat.t.u-tokyo.ac.jp> Cc: freebsd-sparc <freebsd-sparc@FreeBSD.ORG> Subject: Re: PCI-PCI bridge Message-ID: <20030324075708.X76446@locore.ca> In-Reply-To: <ybsel4xqrrw.wl@ett.sat.t.u-tokyo.ac.jp>; from simokawa@sat.t.u-tokyo.ac.jp on Mon, Mar 24, 2003 at 02:04:35PM %2B0900 References: <ybsel4xqrrw.wl@ett.sat.t.u-tokyo.ac.jp>
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Apparently, On Mon, Mar 24, 2003 at 02:04:35PM +0900,
Hidetoshi Shimokawa said words to the effect of;
> Hi,
>
> I have a problem with PCI-PCI bridge on sparc64(sun ultra5) while
> tesing firewire driver.
>
> I have a Adaptec card which has a firewire and a USB2 chips behind
> PCI-PCI bridge. With this card the DMA trasfer speed is poor and
> it sometimes causes timeout which leads to panic(*1).
>
> I finally found that this is because the PCI-PCI bridge
> is not configured correctly and setting the cache line size in the
> bridge by pciconf fixes the problem.
> (pciconf -w -b pci1:1:0 0x0c 16)
>
> Sun's APB PCI-PCI bridges seem to be configured correctly but the one on
> the card doesn't.
> Who should configure such bridges?
> Does upgrading firmware fix the problem?
I think this is the firmware's job but it doesn't always do it. Updating
the firmware may or may not help. We try to fix this up on startup by
walking the device tree and initializing all the cache line size registers,
but I notice that we don't do it for subordinate bridges, only for their
child devices.
You might try something like this (untested):
Index: sparc64/pci/ofw_pci.c
===================================================================
RCS file: /home/ncvs/src/sys/sparc64/pci/ofw_pci.c,v
retrieving revision 1.9
diff -u -r1.9 ofw_pci.c
--- sparc64/pci/ofw_pci.c 19 Feb 2003 05:47:44 -0000 1.9
+++ sparc64/pci/ofw_pci.c 24 Mar 2003 12:48:39 -0000
@@ -216,6 +216,8 @@
panic("ofw_pci_init: OF_getprop failed");
slot = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi);
func = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi);
+ PCIB_WRITE_CONFIG(dev, busno, slot, func, PCIR_CACHELNSZ,
+ clnsz / 4, 1);
if (strcmp(type, OFW_PCI_PCIBUS) == 0) {
/*
* This is a pci-pci bridge, initalize the bus number and
@@ -269,8 +271,6 @@
PCIB_WRITE_CONFIG(dev, busno, slot, func,
PCIR_LATTIMER, imin(lat, 255), 1);
}
- PCIB_WRITE_CONFIG(dev, busno, slot, func,
- PCIR_CACHELNSZ, clnsz / 4, 1);
/* Initialize the intline registers. */
if ((intr = ofw_pci_route_intr(node, ign)) != 255) {
Jake
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