Date: Fri, 2 Jul 2004 15:50:17 -0700 From: Marcel Moolenaar <marcel@xcllnt.net> To: Ruslan Ermilov <ru@freebsd.org> Cc: current@freebsd.org Subject: Re: Query on status of cross-builds Message-ID: <20040702225017.GA3828@dhcp50.pn.xcllnt.net> In-Reply-To: <20040702211936.GA4962@ip.net.ua> References: <20040630164047.GC86725@ip.net.ua> <20040702162001.GD78489@dragon.nuxi.com> <20040702184443.GB4193@ip.net.ua> <20040702201200.GA3485@dhcp50.pn.xcllnt.net> <20040702211936.GA4962@ip.net.ua>
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On Sat, Jul 03, 2004 at 12:19:36AM +0300, Ruslan Ermilov wrote:
> >
> > No. It's a compiler bug on sparc64. I think the old binutils just
> > didn't complain about the invalid instruction. I compared the
> > output of the native cc and the cross cc and they are different.
> > Not much, but fataly so.
> >
> Yes, I produced that diff as well (by using -save-temps).
> Unfortunately, I don't know sparc64 assembler at all...
[context: the faulty instruction is the fstox in the following snippet]
fmuls %f8, %f9, %f8
fstox %f8, %f7
st %f8, [%fp+2031]
As far as I can tell, the fstox is faulty because the target
FP register is a double extended FP, which therefore has to be
an even numbered FP register. The native cc uses %f12, while
the cross cc uses %f7.
Simply replacing %f7 with %f6 or %f8 resolves the problem. Note
that %f8 should have been the register, because it's used by
the subsequent st instruction.
I have no idea why a cross cc would trigger this. Maybe there's
a flags field with more than 32 flags and defined as long. On 64-bit
machines this works out well, on 32-bit machines this breaks.
I dunno...
> But why it worked before BU upgrade? (We didn't have
> these tinderbox failures.)
The old binutils may not have checked for this. This may or may
not have resulted in faulty machine instructions.
> Does GCC use some of the BU bits internally?
No. The compiler goes no further than emitting assembly language.
--
Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net
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