Date: Tue, 3 Mar 2009 21:07:34 +0900 From: Pyun YongHyeon <pyunyh@gmail.com> To: Steve Wills <STEVE@stevenwills.com> Cc: stable@freebsd.org, yongari@freebsd.org Subject: Re: 7.1-R to RELENG_7 upgrade breaks re nic Message-ID: <20090303120734.GB84434@michelle.cdnetworks.co.kr> In-Reply-To: <22F5A82D-290D-4B84-92AB-670EDB49AF22@stevenwills.com> References: <AE144701-409A-4D9F-9947-A725B0810ACA@STEVENWILLS.COM> <20090226003842.GB63173@michelle.cdnetworks.co.kr> <95AD32AC-93AE-4945-A18E-CE7099BEC3CA@stevenwills.com> <20090226041023.GD63173@michelle.cdnetworks.co.kr> <594BAC6A-498A-4B82-A18B-EB09FEA2F322@stevenwills.com> <20090226042732.GE63173@michelle.cdnetworks.co.kr> <22F5A82D-290D-4B84-92AB-670EDB49AF22@stevenwills.com>
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On Thu, Feb 26, 2009 at 12:36:48AM -0500, Steve Wills wrote:
> On Feb 25, 2009, at 11:27 PM, Pyun YongHyeon wrote:
>
> >On Wed, Feb 25, 2009 at 11:15:38PM -0500, Steve Wills wrote:
> >
> >[...]
> >>>I guess re(4) thinks it lost established link. How about unplug and
> >>>then replug UTP cable? Would you show me "devinfo -rv | grep phy"?
> >>
> >>rgephy0 pnpinfo oui=0x732 model=0x11 rev=0x2 at phyno=1
> >>
> >
> >And unpluging/repluging didn't help?
>
> No, didn't help.
>
Ok, when you plug UTP cable can you see "re0: link state changed to
UP" in dmesg output? Or if you unplug the cable, you should see
"re0: link state changed to DOWN"(With "tail -f /var/log/message",
you can easily check this.)
If this is not the case something is wrong on RTL8168D. Since
you've said re0 works for a short time, can you see "re0: link
state changed to DOWN" on your dmesg output right before seeing
"re0: PHY read failed" message?
I've also attached patch which may apply to your case. Would you
give it spin? Note, the patch was generated against CURRENT, so
you should use re(4) in CURRENT. Just save your old re(4)/rl(4)
files and download if_re.c, if_rl.c and if_rlreg.h from CURRENT
and apply the patch.
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Index: sys/dev/re/if_re.c
===================================================================
--- sys/dev/re/if_re.c (revision 189300)
+++ sys/dev/re/if_re.c (working copy)
@@ -1266,6 +1266,8 @@
/* FALLTHROUGH */
case RL_HWREV_8168CP:
case RL_HWREV_8168D:
+ if (hw_rev->rl_rev == RL_HWREV_8168D)
+ sc->rl_flags |= RL_FLAG_PMCH;
sc->rl_flags |= RL_FLAG_PHYWAKE | RL_FLAG_PAR |
RL_FLAG_DESCV2 | RL_FLAG_MACSTAT | RL_FLAG_CMDSTOP;
/*
@@ -1361,7 +1363,8 @@
CSR_WRITE_1(sc, RL_GPIO,
CSR_READ_1(sc, RL_GPIO) & ~0x01);
}
-
+ if ((sc->rl_flags & RL_FLAG_PMCH) != 0)
+ CSR_WRITE_1(sc, RL_PMCH, CSR_READ_1(sc, RL_PMCH) | 0x80);
/* Take PHY out of power down mode. */
if ((sc->rl_flags & RL_FLAG_PHYWAKE) != 0) {
re_gmii_writereg(dev, 1, 0x1f, 0);
@@ -2982,6 +2985,8 @@
CSR_WRITE_1(sc, RL_GPIO,
CSR_READ_1(sc, RL_GPIO) | 0x01);
}
+ if ((sc->rl_flags & RL_FLAG_PMCH) != 0)
+ CSR_WRITE_1(sc, RL_PMCH, CSR_READ_1(sc, RL_PMCH) | 0x80);
/* reinitialize interface if necessary */
if (ifp->if_flags & IFF_UP)
@@ -3043,6 +3048,8 @@
CSR_WRITE_1(sc, RL_GPIO,
CSR_READ_1(sc, RL_GPIO) & ~0x01);
}
+ if ((sc->rl_flags & RL_FLAG_PMCH) != 0)
+ CSR_WRITE_1(sc, RL_PMCH, CSR_READ_1(sc, RL_PMCH) & ~0x80);
if ((ifp->if_capenable & IFCAP_WOL) != 0 &&
(sc->rl_flags & RL_FLAG_WOLRXENB) != 0)
CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_RX_ENB);
Index: sys/pci/if_rlreg.h
===================================================================
--- sys/pci/if_rlreg.h (revision 189300)
+++ sys/pci/if_rlreg.h (working copy)
@@ -133,6 +133,7 @@
#define RL_GMEDIASTAT 0x006C /* 8 bits */
#define RL_MACDBG 0x006D /* 8 bits, 8168C SPIN2 only */
#define RL_GPIO 0x006E /* 8 bits, 8168C SPIN2 only */
+#define RL_PMCH 0x006F /* 8 bits, 8168D only */
#define RL_MAXRXPKTLEN 0x00DA /* 16 bits, chip multiplies by 8 */
#define RL_GTXSTART 0x0038 /* 8 bits */
@@ -880,6 +881,7 @@
int rl_txstart;
uint32_t rl_flags;
#define RL_FLAG_MSI 0x0001
+#define RL_FLAG_PMCH 0x0002
#define RL_FLAG_PHYWAKE 0x0008
#define RL_FLAG_NOJUMBO 0x0010
#define RL_FLAG_PAR 0x0020
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