Date: Tue, 29 Dec 2009 14:46:49 -0600 (CST) From: Mark Tinguely <tinguely@casselton.net> To: freebsd-arm@freebsd.org Subject: cpu_throw()/cpu_switch() and L2 Message-ID: <200912292046.nBTKknjI076659@casselton.net>
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FYI esp Sheeva users with corruption issues: I was looking at my new swtch.S routine and noticed that cpu_throw() and cpu_switch() do not wbinv the level 2 cache. For the majority of the ARMv5 processors this does not do anything. This could effect the Sheeva. Looking at the Sheeva "setttb" routine, wbinv both level 1 and level 2 caches, which it needs to to if the level 2 cache is virtually indexed. In my opinion, we should remove the l2 cache operation calls because if an architecture uses a virtual indexed level 2 caches, then the level cache will need to wb/inv everytime the level 1 cache is wb/inv; It makes more sense to me to do them together. One advantage is we would not miss cache flushing situation like the ones above. The caches in the newer architectures are PIPT, and don't need to be flushed for context changes, and pages sharing, etc. --Mark.
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