Date: Mon, 1 Nov 2010 13:42:48 -0400 From: John Baldwin <jhb@freebsd.org> To: sclark46@earthlink.net Cc: freebsd-stable@freebsd.org, Jeremy Chadwick <freebsd@jdc.parodius.com> Subject: Re: safe mode Message-ID: <201011011342.48384.jhb@freebsd.org> In-Reply-To: <4CCEF93B.9030404@earthlink.net> References: <4CCAE59E.5020006@earthlink.net> <201011010954.42574.jhb@freebsd.org> <4CCEF93B.9030404@earthlink.net>
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On Monday, November 01, 2010 1:30:35 pm Stephen Clark wrote:
> On 11/01/2010 09:54 AM, John Baldwin wrote:
> > On Monday, November 01, 2010 8:38:15 am Stephen Clark wrote:
> >
> >> On 10/29/2010 05:20 PM, John Baldwin wrote:
> >>
> >>> On Friday, October 29, 2010 4:20:24 pm Stephen Clark wrote:
> >>>
> >>>
> >>>>> rr232x: RocketRAID 232x controller driver v1.02 (Jan 16 2008 04:16:21)
> >>>>> hptrr: HPT RocketRAID controller driver v1.1 (Jan 16 2008 04:16:19)
> >>>>>
> >>>>>
> >>>>>
> >>>> big snip
> >>>>
> >>>>
> >>>>> lo0: bpf attached
> >>>>> rr232x: no controller detected.
> >>>>> hptrr: no controller detected.
> >>>>> m
> >>>>>
> >>>>>
> >>>>>
> >>>> Why does FreeBSD think I have a rocket raid controller? This the
generic
> >>>> kernel.
> >>>> Is there some way disable this from loading?
> >>>>
> >>>>
> >>> The hptrr driver is in GENERIC in 6.x and it always prints out the first
> >>> message. You can ignore it.
> >>>
> >>>
> >>>
> >> atapci0:<Intel ICH8M UDMA100 controller> port
> >> 0x1f0-0x1f7,0x3f6,0x170-0x177,0x0
> >> atapci0: Reserved 0x10 bytes for rid 0x20 type 4 at 0xffa0
> >> ata0:<ATA channel 0> on atapci0
> >> atapci0: Reserved 0x8 bytes for rid 0x10 type 4 at 0x1f0
> >> atapci0: Reserved 0x1 bytes for rid 0x14 type 4 at 0x3f6
> >> ata0: reset tp1 mask=03 ostat0=40 ostat1=40
> >> ata0: stat0=0x0c err=0x0c lsb=0x0c msb=0x0c
> >> ata0: stat0=0x0f err=0x0f lsb=0x0f msb=0x0f
> >> ata0: stat0=0x0f err=0x0f lsb=0x0f msb=0x0f
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat0=0x0f err=0x0f lsb=0x0f msb=0x0f
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat0=0x0f err=0x0f lsb=0x0f msb=0x0f
> >> ata0: stat0=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: stat1=0x07 err=0x07 lsb=0x07 msb=0x07
> >> ata0: reset tp2 stat0=87 stat1=87 devices=0x0
> >> ioapic0: routing intpin 14 (ISA IRQ 14) to vector 55
> >> ata0: [MPSAFE]
> >> ata0: [ITHREAD]
> >> atapci1:<Intel ICH8M SATA300 controller> port
> >> 0xc000-0xc007,0xbc00-0xbc03,0xb80
> >> atapci1: Reserved 0x10 bytes for rid 0x20 type 4 at 0xb480
> >> atapci1: [MPSAFE]
> >> atapci1: [ITHREAD]
> >> atapci1: Reserved 0x10 bytes for rid 0x24 type 4 at 0xb400
> >> ata2:<ATA channel 0> on atapci1
> >> atapci1: Reserved 0x8 bytes for rid 0x10 type 4 at 0xc000
> >> atapci1: Reserved 0x4 bytes for rid 0x14 type 4 at 0xbc00
> >> ata2: reset tp1 mask=03 ostat0=50 ostat1=00
> >> ata2: stat0=0x50 err=0x01 lsb=0x00 msb=0x00
> >> ata2: stat1=0x00 err=0x01 lsb=0x00 msb=0x00
> >> ata2: reset tp2 stat0=50 stat1=00 devices=0x1<ATA_MASTER>
> >> ata2: [MPSAFE]
> >> ata2: [ITHREAD]
> >> ata3:<ATA channel 1> on atapci1
> >> atapci1: Reserved 0x8 bytes for rid 0x18 type 4 at 0xb880
> >> atapci1: Reserved 0x4 bytes for rid 0x1c type 4 at 0xb800
> >> ata3: reset tp1 mask=03 ostat0=7f ostat1=7f
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat0=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: stat1=0x7f err=0xff lsb=0xff msb=0xff
> >> ata3: reset tp2 stat0=ff stat1=ff devices=0x0
> >> ata3: [MPSAFE]
> >> ata3: [ITHREAD]
> >> ....
> >> ioapic0: Assigning ISA IRQ 1 to local APIC 0
> >> ioapic0: Assigning ISA IRQ 4 to local APIC 2
> >> ioapic0: Assigning ISA IRQ 9 to local APIC 0
> >> ioapic0: Assigning ISA IRQ 14 to local APIC 2
> >> ioapic0: Assigning PCI IRQ 16 to local APIC 0
> >> ioapic0: Assigning PCI IRQ 18 to local APIC 2
> >> ioapic0: Assigning PCI IRQ 19 to local APIC 0
> >> ioapic0: Assigning PCI IRQ 21 to local APIC 2
> >> ioapic0: Assigning PCI IRQ 23 to local APIC 0
> >> msi: Assigning MSI IRQ 256 to local APIC 2
> >>
> > Hmm, 7.2 does not register a handler for IRQ 15 at all, and it doesn't
find a
> > second channel (ata1) on atapci0 either. I think that is probably the
> > difference.
> >
> > Try this patch:
> >
> > Index: ata-chipset.c
> > ===================================================================
> > --- ata-chipset.c (revision 214624)
> > +++ ata-chipset.c (working copy)
> > @@ -1762,58 +1762,58 @@
> > {
> > struct ata_pci_controller *ctlr = device_get_softc(dev);
> > static struct ata_chip_id ids[] =
> > - {{ ATA_I82371FB, 0, 0, 0x00, ATA_WDMA2, "PIIX" },
> > - { ATA_I82371SB, 0, 0, 0x00, ATA_WDMA2, "PIIX3" },
> > - { ATA_I82371AB, 0, 0, 0x00, ATA_UDMA2, "PIIX4" },
> > - { ATA_I82443MX, 0, 0, 0x00, ATA_UDMA2, "PIIX4" },
> > - { ATA_I82451NX, 0, 0, 0x00, ATA_UDMA2, "PIIX4" },
> > - { ATA_I82801AB, 0, 0, 0x00, ATA_UDMA2, "ICH0" },
> > - { ATA_I82801AA, 0, 0, 0x00, ATA_UDMA4, "ICH" },
> > - { ATA_I82372FB, 0, 0, 0x00, ATA_UDMA4, "ICH" },
> > - { ATA_I82801BA, 0, 0, 0x00, ATA_UDMA5, "ICH2" },
> > - { ATA_I82801BA_1, 0, 0, 0x00, ATA_UDMA5, "ICH2" },
> > - { ATA_I82801CA, 0, 0, 0x00, ATA_UDMA5, "ICH3" },
> > - { ATA_I82801CA_1, 0, 0, 0x00, ATA_UDMA5, "ICH3" },
> > - { ATA_I82801DB, 0, 0, 0x00, ATA_UDMA5, "ICH4" },
> > - { ATA_I82801DB_1, 0, 0, 0x00, ATA_UDMA5, "ICH4" },
> > - { ATA_I82801EB, 0, 0, 0x00, ATA_UDMA5, "ICH5" },
> > - { ATA_I82801EB_S1, 0, 0, 0x00, ATA_SA150, "ICH5" },
> > - { ATA_I82801EB_R1, 0, 0, 0x00, ATA_SA150, "ICH5" },
> > - { ATA_I6300ESB, 0, 0, 0x00, ATA_UDMA5, "6300ESB" },
> > - { ATA_I6300ESB_S1, 0, 0, 0x00, ATA_SA150, "6300ESB" },
> > - { ATA_I6300ESB_R1, 0, 0, 0x00, ATA_SA150, "6300ESB" },
> > - { ATA_I82801FB, 0, 0, 0x00, ATA_UDMA5, "ICH6" },
> > - { ATA_I82801FB_S1, 0, AHCI, 0x00, ATA_SA150, "ICH6" },
> > - { ATA_I82801FB_R1, 0, AHCI, 0x00, ATA_SA150, "ICH6" },
> > - { ATA_I82801FBM, 0, AHCI, 0x00, ATA_SA150, "ICH6M" },
> > - { ATA_I82801GB, 0, 0, 0x00, ATA_UDMA5, "ICH7" },
> > - { ATA_I82801GB_S1, 0, AHCI, 0x00, ATA_SA300, "ICH7" },
> > - { ATA_I82801GB_R1, 0, AHCI, 0x00, ATA_SA300, "ICH7" },
> > - { ATA_I82801GB_AH, 0, AHCI, 0x00, ATA_SA300, "ICH7" },
> > - { ATA_I82801GBM_S1, 0, AHCI, 0x00, ATA_SA300, "ICH7M" },
> > - { ATA_I82801GBM_R1, 0, AHCI, 0x00, ATA_SA300, "ICH7M" },
> > - { ATA_I82801GBM_AH, 0, AHCI, 0x00, ATA_SA300, "ICH7M" },
> > - { ATA_I63XXESB2, 0, 0, 0x00, ATA_UDMA5, "63XXESB2" },
> > - { ATA_I63XXESB2_S1, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" },
> > - { ATA_I63XXESB2_S2, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" },
> > - { ATA_I63XXESB2_R1, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" },
> > - { ATA_I63XXESB2_R2, 0, AHCI, 0x00, ATA_SA300, "63XXESB2" },
> > - { ATA_I82801HB_S1, 0, AHCI, 0x00, ATA_SA300, "ICH8" },
> > - { ATA_I82801HB_S2, 0, AHCI, 0x00, ATA_SA300, "ICH8" },
> > - { ATA_I82801HB_R1, 0, AHCI, 0x00, ATA_SA300, "ICH8" },
> > - { ATA_I82801HB_AH4, 0, AHCI, 0x00, ATA_SA300, "ICH8" },
> > - { ATA_I82801HB_AH6, 0, AHCI, 0x00, ATA_SA300, "ICH8" },
> > - { ATA_I82801HBM, 0, 0, 0x00, ATA_UDMA5, "ICH8M" },
> > - { ATA_I82801HBM_S1, 0, 0, 0x00, ATA_SA150, "ICH8M" },
> > - { ATA_I82801HBM_S2, 0, AHCI, 0x00, ATA_SA300, "ICH8M" },
> > - { ATA_I82801HBM_S3, 0, AHCI, 0x00, ATA_SA300, "ICH8M" },
> > - { ATA_I82801IB_S1, 0, AHCI, 0x00, ATA_SA300, "ICH9" },
> > - { ATA_I82801IB_S2, 0, AHCI, 0x00, ATA_SA300, "ICH9" },
> > - { ATA_I82801IB_AH2, 0, AHCI, 0x00, ATA_SA300, "ICH9" },
> > - { ATA_I82801IB_AH4, 0, AHCI, 0x00, ATA_SA300, "ICH9" },
> > - { ATA_I82801IB_AH6, 0, AHCI, 0x00, ATA_SA300, "ICH9" },
> > - { ATA_I82801IB_R1, 0, AHCI, 0x00, ATA_SA300, "ICH9" },
> > - { ATA_I31244, 0, 0, 0x00, ATA_SA150, "31244" },
> > + {{ ATA_I82371FB, 0, 0, 2, ATA_WDMA2, "PIIX" },
> > + { ATA_I82371SB, 0, 0, 2, ATA_WDMA2, "PIIX3" },
> > + { ATA_I82371AB, 0, 0, 2, ATA_UDMA2, "PIIX4" },
> > + { ATA_I82443MX, 0, 0, 2, ATA_UDMA2, "PIIX4" },
> > + { ATA_I82451NX, 0, 0, 2, ATA_UDMA2, "PIIX4" },
> > + { ATA_I82801AB, 0, 0, 2, ATA_UDMA2, "ICH0" },
> > + { ATA_I82801AA, 0, 0, 2, ATA_UDMA4, "ICH" },
> > + { ATA_I82372FB, 0, 0, 2, ATA_UDMA4, "ICH" },
> > + { ATA_I82801BA, 0, 0, 2, ATA_UDMA5, "ICH2" },
> > + { ATA_I82801BA_1, 0, 0, 2, ATA_UDMA5, "ICH2" },
> > + { ATA_I82801CA, 0, 0, 2, ATA_UDMA5, "ICH3" },
> > + { ATA_I82801CA_1, 0, 0, 2, ATA_UDMA5, "ICH3" },
> > + { ATA_I82801DB, 0, 0, 2, ATA_UDMA5, "ICH4" },
> > + { ATA_I82801DB_1, 0, 0, 2, ATA_UDMA5, "ICH4" },
> > + { ATA_I82801EB, 0, 0, 2, ATA_UDMA5, "ICH5" },
> > + { ATA_I82801EB_S1, 0, 0, 2, ATA_SA150, "ICH5" },
> > + { ATA_I82801EB_R1, 0, 0, 2, ATA_SA150, "ICH5" },
> > + { ATA_I6300ESB, 0, 0, 2, ATA_UDMA5, "6300ESB" },
> > + { ATA_I6300ESB_S1, 0, 0, 2, ATA_SA150, "6300ESB" },
> > + { ATA_I6300ESB_R1, 0, 0, 2, ATA_SA150, "6300ESB" },
> > + { ATA_I82801FB, 0, 0, 2, ATA_UDMA5, "ICH6" },
> > + { ATA_I82801FB_S1, 0, AHCI, 0, ATA_SA150, "ICH6" },
> > + { ATA_I82801FB_R1, 0, AHCI, 0, ATA_SA150, "ICH6" },
> > + { ATA_I82801FBM, 0, AHCI, 0, ATA_SA150, "ICH6M" },
> > + { ATA_I82801GB, 0, 0, 1, ATA_UDMA5, "ICH7" },
> > + { ATA_I82801GB_S1, 0, AHCI, 0, ATA_SA300, "ICH7" },
> > + { ATA_I82801GB_R1, 0, AHCI, 0, ATA_SA300, "ICH7" },
> > + { ATA_I82801GB_AH, 0, AHCI, 0, ATA_SA300, "ICH7" },
> > + { ATA_I82801GBM_S1, 0, AHCI, 0, ATA_SA300, "ICH7M" },
> > + { ATA_I82801GBM_R1, 0, AHCI, 0, ATA_SA300, "ICH7M" },
> > + { ATA_I82801GBM_AH, 0, AHCI, 0, ATA_SA300, "ICH7M" },
> > + { ATA_I63XXESB2, 0, 0, 1, ATA_UDMA5, "63XXESB2" },
> > + { ATA_I63XXESB2_S1, 0, AHCI, 0, ATA_SA300, "63XXESB2" },
> > + { ATA_I63XXESB2_S2, 0, AHCI, 0, ATA_SA300, "63XXESB2" },
> > + { ATA_I63XXESB2_R1, 0, AHCI, 0, ATA_SA300, "63XXESB2" },
> > + { ATA_I63XXESB2_R2, 0, AHCI, 0, ATA_SA300, "63XXESB2" },
> > + { ATA_I82801HB_S1, 0, AHCI, 0, ATA_SA300, "ICH8" },
> > + { ATA_I82801HB_S2, 0, AHCI, 0, ATA_SA300, "ICH8" },
> > + { ATA_I82801HB_R1, 0, AHCI, 0, ATA_SA300, "ICH8" },
> > + { ATA_I82801HB_AH4, 0, AHCI, 0, ATA_SA300, "ICH8" },
> > + { ATA_I82801HB_AH6, 0, AHCI, 0, ATA_SA300, "ICH8" },
> > + { ATA_I82801HBM, 0, 0, 1, ATA_UDMA5, "ICH8M" },
> > + { ATA_I82801HBM_S1, 0, 0, 0, ATA_SA150, "ICH8M" },
> > + { ATA_I82801HBM_S2, 0, AHCI, 0, ATA_SA300, "ICH8M" },
> > + { ATA_I82801HBM_S3, 0, AHCI, 0, ATA_SA300, "ICH8M" },
> > + { ATA_I82801IB_S1, 0, AHCI, 0, ATA_SA300, "ICH9" },
> > + { ATA_I82801IB_S2, 0, AHCI, 0, ATA_SA300, "ICH9" },
> > + { ATA_I82801IB_AH2, 0, AHCI, 0, ATA_SA300, "ICH9" },
> > + { ATA_I82801IB_AH4, 0, AHCI, 0, ATA_SA300, "ICH9" },
> > + { ATA_I82801IB_AH6, 0, AHCI, 0, ATA_SA300, "ICH9" },
> > + { ATA_I82801IB_R1, 0, AHCI, 0, ATA_SA300, "ICH9" },
> > + { ATA_I31244, 0, 0, 2, ATA_SA150, "31244" },
> > { 0, 0, 0, 0, 0, 0}};
> >
> > if (!(ctlr->chip = ata_match_chip(dev, ids)))
> > @@ -1855,6 +1855,7 @@
> >
> > /* non SATA intel chips goes here */
> > else if (ctlr->chip->max_dma< ATA_SA150) {
> > + ctlr->channels = ctlr->chip->cfg2;
> > ctlr->allocate = ata_intel_allocate;
> > ctlr->setmode = ata_intel_new_setmode;
> > }
> >
> >
> >
> Hi John,
>
> I tried the patch - same results - Also the patch did not apply cleanly,
> there were 3 chipset ids that were not in
> the 6.3 code, I fixed the patch by hand. One thing that sort of confuses
> me is the last bit of the patch
>
> /* non SATA intel chips goes here */
> else if (ctlr->chip->max_dma< ATA_SA150) {
> + ctlr->channels = ctlr->chip->cfg2;
> ctlr->allocate = ata_intel_allocate;
> ctlr->setmode = ata_intel_new_setmode;
> }
>
> since the drive is identified as SATA300:
>
> ad4: 152627MB <WDC WD1600BEKT-00A25T0 01.01A01> at ata2-master SATA300
> ad4: 312581808 sectors [310101C/16H/63S] 16 sectors/interrupt 1 depth queue
> GEOM: new disk ad4
The point is to limit atapci0 to only having an ata0 and no ata1, then it will
not register an interrupt handler for IRQ15 and get a constant storm of
interrupts. Can you get a verbose dmesg from the patched kernel if possible
and the pciconf -l lines for atapci0 and atapci1 (the pciconf can be from any
working kernel).
--
John Baldwin
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