Date: Mon, 8 Apr 2013 15:33:34 +0300 From: Aleksandr Rybalko <ray@freebsd.org> To: Adrian Chadd <adrian@freebsd.org> Cc: Dmytro <dioptimizer@gmail.com>, freebsd-mips@freebsd.org Subject: Re: [PATCH] MMC/SD SPI-mode driver Message-ID: <20130408153334.9cc11688aedbf32dcbf83a7b@freebsd.org> In-Reply-To: <CAJ-VmokXseALmvvA9wsgZEBKSP0AGA988592TbsRb%2B4F0-UEcw@mail.gmail.com> References: <CAK1zEjs=hC%2BpAYBgGq4t7%2BA_JPLaH6rhvEjD%2B1RNk1Ziu8E-4g@mail.gmail.com> <CAD44qMWpz-sjNKwRH6K=xicFXYutfk7R%2BN%2B%2Bo7cbgTg7rcQbkA@mail.gmail.com> <CAK1zEjuVZU4A59q5GxLcKTnFF9mcrbVmJ=w268uSJ=3sxVf1PA@mail.gmail.com> <CAD44qMURrssyXUz-%2Btd226chPA_MbKJ29ZApozbT2cEYbQwSqw@mail.gmail.com> <CAJ-Vmo=nQMuuJAW786egjuXCf0LGOd9g%2BCEEKdOJjPLRQFpKUg@mail.gmail.com> <20130407011307.9a9a9d64.ray@freebsd.org> <CAJ-Vmo=aeLCmBYpn9YMsGjq%2B9aF_Es-rByJ3RSnYkJYUECtLuQ@mail.gmail.com> <20130407022428.86a66c6a.ray@freebsd.org> <CAJ-VmokXseALmvvA9wsgZEBKSP0AGA988592TbsRb%2B4F0-UEcw@mail.gmail.com>
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On Sat, 6 Apr 2013 19:57:05 -0700 Adrian Chadd <adrian@freebsd.org> wrote: > On 6 April 2013 16:24, Aleksandr Rybalko <ray@freebsd.org> wrote: > > >> The other question is how we implement it. You've implemented a "get > >> block" device method. That's a very atheros chipset specific hack just > >> to get accelerated flash IO. Is there perhaps a better way to approach > >> this? > > > > As I see, no way to put data back to flash. > > Well, look at the Linux code. If there's a read that can be satisfied > by a copy, it: > > * puts the flash device back into mapped mode; > * does the transfer; > * puts the flash device back into SPI mode. > > That way both can occur independently. Agree, but you forget to say about lock/unlock :) > > >> What about the 8 versus 32 bit shifting that I see in the driver? Are > >> we able to actually shift 32 bits at a time? > > > > Currently we do 1 bit shifting :))) Pure, 1-bit control. > > Maybe you (as Atheros guy) know how to shift more :))) > > Writes are clocked out like that, sure. But if I read the linux code > right, they do up to 32 bits of shifting at once, then do a 32 bit > read. I don't think we will get much progress here. if we will do it with 32bit width, we will do same GPIO stuff, but plus care about alignment. > > Rather than us shifting a byte in/out at a time over SPI. 90%/10% - find easiest way :-P :) > > > > Adrian -- Aleksandr Rybalko <ray@freebsd.org>
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