Date: Tue, 28 Apr 2015 17:13:02 +0300 From: Konstantin Belousov <kostikbel@gmail.com> To: John Baldwin <jhb@freebsd.org> Cc: freebsd-arch@freebsd.org, Davide Italiano <davide@freebsd.org>, Adrian Chadd <adrian@freebsd.org> Subject: Re: RFC: setting performance_cx_lowest=C2 in -HEAD to avoid lock contention on many-CPU boxes Message-ID: <20150428141302.GH2390@kib.kiev.ua> In-Reply-To: <1832557.zVusTDjZUx@ralph.baldwin.cx> References: <CAJ-VmonG%2By5gzoYmer70KAswUorvezcZxRSDsQWj47=jsAZ71w@mail.gmail.com> <CACYV=-F_p_Pe=y%2Bs4COk%2BJf1Y8EEfxFcCKPmOXX9RE0k-KqGAA@mail.gmail.com> <CAJ-Vmo=RrcS2dYX38BW4ezMTBrY3-t6=rCnc79AwSYD2gJy55w@mail.gmail.com> <1832557.zVusTDjZUx@ralph.baldwin.cx>
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On Tue, Apr 28, 2015 at 09:35:10AM -0400, John Baldwin wrote: > On Saturday, April 25, 2015 11:45:10 AM Adrian Chadd wrote: > > On 25 April 2015 at 11:18, Davide Italiano <davide@freebsd.org> wrote: > > > On Sat, Apr 25, 2015 at 9:31 AM, Adrian Chadd <adrian@freebsd.org> wrote: > > >> Hi! > > >> > > >> I've been doing some NUMA testing on large boxes and I've found that > > >> there's lock contention in the ACPI path. It's due to my change a > > >> while ago to start using sleep states above ACPI C1 by default. The > > >> ACPI C3 state involves a bunch of register fiddling in the ACPI sleep > > >> path that grabs a serialiser lock, and on an 80 thread box this is > > >> costly. > > >> > > >> I'd like to drop performance_cx_lowest to C2 in -HEAD. ACPI C2 state > > >> doesn't require the same register fiddling (to disable bus mastering, > > >> if I'm reading it right) and so it doesn't enter that particular > > >> serialised path. I've verified on Westmere-EX, Sandybridge, Ivybridge > > >> and Haswell boxes that ACPI C2 does let one drop down into a deeper > > >> CPU sleep state (C6 on each of these). I think is still a good default > > >> for both servers and desktops. > > >> > > >> If no-one has a problem with this then I'll do it after the weekend. > > >> > > > > > > This sounds to me just a way to hide a problem. > > > Very few people nowaday run on NUMA and they can tune the machine as > > > they like when they do testing. > > > If there's a lock contention problem, it needs to be fixed and not > > > hidden under another default. > > > > The lock contention problem is inside ACPI and how it's designed/implemented. > > We're not going to easily be able to make ACPI lock "better" as we're > > constrained by how ACPI implements things in the shared ACPICA code. > > Is the contention actually harmful? Note that this only happens when the > CPUs are idle, not when doing actual work. In addition, IIRC, the ACPI idle > stuff uses hueristics to only drop into deeper sleep states if the CPU has > recently been idle "more" so that if you are relatively busy you will only go > into C1 instead. (I think this latter might have changed since eventtimers > came in, it looks like we now choose the idle state based on how long until > the next timer interrupt?) You have to spin, waiting other cores, to get the right to reduce the power state. > > If the only consequence of this is that it adds noise to profiling, then hack > your profiling results to ignore this lock. I think that is a better tradeoff > than sacraficing power gains to reduce noise in profiling output. I suspect that it adds latency, since interrupts cannot stop the wait for the ACPI lock. Also, it probably increases the power usage since CPU has to spend more time contending for the lock instead of sleeping. > > Alternatively, your machine may be better off using cpu_idle_mwait. There > are already CPUs now that only advertise deeper sleep states for use with > mwait but not ACPI, so we may certainly end up with defaulting to mwait > instead of ACPI for certain CPUs anyway. cpu_idle_mwait is quite useless, it only enters C1, which should be almost the same as hlt. mwait for C1 might reduce latency of waking up, but definitely would not reduce power consumption on par with higher Cx. That said, I think that for non-laptop usage, limiting lowest state to C2 is fine. For Haswells, Intel recommendation for BIOS writers is to limit the announced states to C2 (eliminating the BM avoidance at all). Internally ACPI C2 is mapped to CPU C6 or might be even C7.
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