Date: Thu, 09 May 2013 11:42:28 -0400 From: Jim Ohlstein <jim@ohlste.in> To: Konstantin Belousov <kostikbel@gmail.com> Cc: freebsd-stable@freebsd.org Subject: Re: Apparent regression in r250359 Message-ID: <518BC3E4.1030104@ohlste.in> In-Reply-To: <20130509143038.GV3047@kib.kiev.ua> References: <518A880C.3090906@ohlste.in> <20130509053055.GM3047@kib.kiev.ua> <518BAEFB.5090204@ohlste.in> <20130509143038.GV3047@kib.kiev.ua>
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On 05/09/13 10:30, Konstantin Belousov wrote:
> On Thu, May 09, 2013 at 10:13:15AM -0400, Jim Ohlstein wrote:
>> # sysctl hw.model
>> hw.model: AMD FX(tm)-8350 Eight-Core Processor
> Ahh, so it seems that this is a CPU with the LWP.
> Please try the patch at the end of message.
Same error
>
> As another workaround, which does not disable AVX support, you
> could try loader tunable hw.xsave_mask=0x7.
This works
<snip>
>
> diff --git a/sys/amd64/amd64/fpu.c b/sys/amd64/amd64/fpu.c
> index de79baa..61ce94d 100644
> --- a/sys/amd64/amd64/fpu.c
> +++ b/sys/amd64/amd64/fpu.c
> @@ -687,7 +687,7 @@ fpugetregs(struct thread *td)
> offsetof(struct xstate_hdr, xstate_bv));
> max_ext_n = flsl(xsave_mask);
> for (i = 0; i < max_ext_n; i++) {
> - bit = 1 << i;
> + bit = 1ULL << i;
> if ((*xstate_bv & bit) != 0)
> continue;
> bcopy((char *)fpu_initialstate +
>
--
Jim Ohlstein
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