Date: Thu, 20 Apr 2000 10:39:47 +0900 From: Osamu MIHARA <mihara@prd.fc.nec.co.jp> To: gallatin@cs.duke.edu Cc: freebsd-smp@freebsd.org Subject: Re: I/O APIC Message-ID: <868zy9v9cs.wl@oz.prd.fc.nec.co.jp> In-Reply-To: In your message of "Wed, 19 Apr 2000 17:56:01 -0400 (EDT)" <14590.10426.763064.533504@grasshopper.cs.duke.edu> References: <14590.10426.763064.533504@grasshopper.cs.duke.edu>
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# I just started to study APIC and SMP stuffs, so please correct me if # I'm wrong. At Wed, 19 Apr 2000 17:56:01 -0400 (EDT), Andrew Gallatin <gallatin@cs.duke.edu> wrote: > When installing Solaris/x86 on one of our PowerEdge 2400s (SMP > capable, 2 I/O APICs, 1 CPU), I noticed that it uses the I/O APICs for > interrupts rather than the normal isa irq x. Is there an advantage to > this? One advantage is that multiple I/O-APICs can handle more interrupts than traditional PIC. If you use PIC, it can handles only 16 interrupts at most, and you may need share a interrupt for some devices. With multiple IO-APICs, you don't need to share interrupts, and it does not pay for overheads of interrupt sharing, resulting in better I/O throughput, even with single CPU. -- Osamu MIHARA // NEC Printers Division To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
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