Date: Wed, 7 Jun 95 13:53:02 MDT From: terry@cs.weber.edu (Terry Lambert) To: rgrimes@gndrsh.aac.dev.com (Rodney W. Grimes) Cc: davidg@Root.COM, maddox@CS.Berkeley.EDU, sysseh@devetir.qld.gov.au, bugs@FreeBSD.org Subject: Re: 2.0.5-A: Very disheartening? Message-ID: <9506071953.AA08491@cs.weber.edu> In-Reply-To: <199506070944.CAA01756@gndrsh.aac.dev.com> from "Rodney W. Grimes" at Jun 7, 95 02:44:14 am
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> I do know for certain that any write to memory of data that is in the > Pentium I cache will cause it to invalidate the I cache line. It will, according to "The Undocumented PC". The Pentium is the only Intel processer for which this is true. Terry Lambert terry@cs.weber.edu --- Any opinions in this posting are my own and not those of my present or previous employers.
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