Date: Thu, 11 Feb 2010 23:01:26 +0530 From: "C. Jayachandran" <c.jayachandran@gmail.com> To: "M. Warner Losh" <imp@bsdimp.com> Cc: hzou@netlogicmicro.com, jayachandranc@netlogicmicro.com, freebsd-mips@freebsd.org Subject: Re: RMI status Message-ID: <98a59be81002110931h2fd2c250heec0520860768689@mail.gmail.com> In-Reply-To: <20100211.100530.390080239494612674.imp@bsdimp.com> References: <5709963B-3F83-44FE-991F-A3227A2052DC@lakerest.net> <98a59be81002110655y60ab4e8cj473f4b6ecf6f5ae4@mail.gmail.com> <A718B150-C815-414E-947D-9FD94830DD7D@lakerest.net> <20100211.100530.390080239494612674.imp@bsdimp.com>
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On Thu, Feb 11, 2010 at 10:35 PM, M. Warner Losh <imp@bsdimp.com> wrote: > <snip> > cj> Any plan of doing n32? =A0n32 with 64-bit physical address support ma= y > cj> be a better suited base configuration for XLR than o32, because we ca= n > cj> use all of the memory and the 64 bit support, without having to go > cj> full 64-bit. > > rrs>Not sure.. Warner, what do you think.. should we mess with n32? > > My plans are to mine the Cavium port for n32 and n64 support. =A0I've > done some preliminary work on this, and it doesn't look too horrible. > I do think there's a place to do both n32 as well as n64 in this > system. =A0Either one, in the kernel, could more easily access the > hardware on Octeon (and I think XLR) that has a bunch of funky bits > set in the higher bits and is too sparse to be covered by one wired > TLB entry. > > I have no plans to support the so-called 'o64' mode or the 'o32 with > 64-bit registers' mode of operation. =A0I'd like to retire the 'let's > run an o32 binary in 64-bit mode while in the kernel' mode that we're > using for Octeon right now. =A0It is useful as a bootstrap, but just a > little too non-standard for my tastes. =A0We'll get better compiler > support if we don't try to do unnatural things like this anyway. The FreeBSD 6 port to XLR was o64. Even in o32/o64, it is useful to go enable 64bit mode in kernel (with KX bit and maybe XTLB handler) since you can access the whole physical memory and IO without using TLB entries. Is the plan to have full n32 (including userspace), or have compatibility code to run o32 userspace on n32 kernel? I guess I should have a look at the current support.... JC.
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