Date: Thu, 5 Aug 2010 19:55:15 +0530 From: "Jayachandran C." <c.jayachandran@gmail.com> To: Alan Cox <alc@cs.rice.edu> Cc: "Jayachandran C." <jchandra@freebsd.org>, mips@freebsd.org Subject: Re: svn commit: r210846 - in head/sys/mips: include mips Message-ID: <AANLkTi=vkG-cntJYYEdhO4AzOO91LB6n%2B45dUSxCMTp3@mail.gmail.com> In-Reply-To: <AANLkTinP7eMNm4yp6T2TTteSvthdgLJOj-ihHrQJ4T49@mail.gmail.com> References: <201008041412.o74ECAix092415@svn.freebsd.org> <4C5A569B.9090401@cs.rice.edu> <AANLkTinP7eMNm4yp6T2TTteSvthdgLJOj-ihHrQJ4T49@mail.gmail.com>
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[-- Attachment #1 --] On Thu, Aug 5, 2010 at 4:26 PM, Jayachandran C. <c.jayachandran@gmail.com> wrote: > On Thu, Aug 5, 2010 at 11:43 AM, Alan Cox <alc@cs.rice.edu> wrote: >> Just an observation ... >> >> Jayachandran C. wrote: >>> >>> Author: jchandra >>> Date: Wed Aug 4 14:12:09 2010 >>> New Revision: 210846 >>> URL: http://svn.freebsd.org/changeset/base/210846 >>> >>> Log: >>> Add 3 level page tables for MIPS in n64. >>> - 32 bit compilation will still use old 2 level page tables >>> - re-arrange pmap code so that adding another level is easier >>> - pmap code for 3 level page tables for n64 >>> - update TLB handler to traverse 3 levels in n64 >>> Reviewed by: jmallett >> >> MIPS doesn't really need to use atomic_cmpset_int() in situations like this >> because the software dirty bit emulation in trap.c acquires the pmap lock. >> Atomics like this appear to be a carryover from i386 where the >> hardware-managed TLB might concurrently set the modified bit. > > Then I guess we should be able to use *pte directly, without pbits, > obits and the retry loop. > Will try this change... Can you have a look at the attached patch and see if it is okay? This has the above changes, and I have attempted to fix the other issue you had reported on wired mapping count too. There are a few calls for loadandclear() on pte too, with pmap lock held, can this be avoided too? Thanks, JC. [-- Attachment #2 --] Index: sys/mips/include/pmap.h =================================================================== --- sys/mips/include/pmap.h (revision 210796) +++ sys/mips/include/pmap.h (working copy) @@ -124,7 +124,6 @@ TAILQ_ENTRY(pv_entry) pv_list; TAILQ_ENTRY(pv_entry) pv_plist; vm_page_t pv_ptem; /* VM page for pte */ - boolean_t pv_wired; /* whether this entry is wired */ } *pv_entry_t; Index: sys/mips/mips/pmap.c =================================================================== --- sys/mips/mips/pmap.c (revision 210846) +++ sys/mips/mips/pmap.c (working copy) @@ -1473,7 +1473,6 @@ pv->pv_va = va; pv->pv_pmap = pmap; pv->pv_ptem = mpte; - pv->pv_wired = FALSE; TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); m->md.pv_list_count++; @@ -1717,7 +1716,7 @@ vm_page_lock_queues(); PMAP_LOCK(pmap); for (; sva < eva; sva = va_next) { - pt_entry_t pbits, obits; + pt_entry_t pbits; vm_page_t m; vm_paddr_t pa; @@ -1746,8 +1745,7 @@ /* Skip invalid PTEs */ if (!pte_test(pte, PTE_V)) continue; -retry: - obits = pbits = *pte; + pbits = *pte; pa = TLBLO_PTE_TO_PA(pbits); if (page_is_managed(pa) && pte_test(&pbits, PTE_D)) { m = PHYS_TO_VM_PAGE(pa); @@ -1758,8 +1756,7 @@ pte_set(&pbits, PTE_RO); if (pbits != *pte) { - if (!atomic_cmpset_int((u_int *)pte, obits, pbits)) - goto retry; + *pte = pbits; pmap_update_page(pmap, sva, pbits); } } @@ -1897,7 +1894,6 @@ pv->pv_va = va; pv->pv_pmap = pmap; pv->pv_ptem = mpte; - pv->pv_wired = wired; TAILQ_INSERT_TAIL(&pmap->pm_pvlist, pv, pv_plist); TAILQ_INSERT_TAIL(&m->md.pv_list, pv, pv_list); m->md.pv_list_count++; @@ -2655,15 +2651,22 @@ pmap_page_wired_mappings(vm_page_t m) { pv_entry_t pv; + pmap_t pmap; + pt_entry_t *pte; int count; count = 0; if ((m->flags & PG_FICTITIOUS) != 0) return (count); vm_page_lock_queues(); - TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) - if (pv->pv_wired) - count++; + TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) { + pmap = pv->pv_pmap; + PMAP_LOCK(pmap); + pte = pmap_pte(pmap, pv->pv_va); + if (pte_test(pte, PTE_W)) + count++; + PMAP_UNLOCK(pmap); + } vm_page_unlock_queues(); return (count); }home | help
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