Date: Sun, 29 May 2011 03:45:48 +0200 From: "deeptech71@gmail.com" <deeptech71@gmail.com> To: freebsd-current@freebsd.org Subject: Re: pcib allocation failure Message-ID: <BANLkTi=TJ-N1Edaz=woaMoMVbOET3RyDvw@mail.gmail.com> In-Reply-To: <201105260940.37035.jhb@freebsd.org> References: <BANLkTikTHFTHff5iuPDMxR6zhezEcTaZSA@mail.gmail.com> <BANLkTin4=FTeJeBhv9Tp5DkWo8TbTf-cvA@mail.gmail.com> <BANLkTimBBR3yJsRsx7qv4cpnkpBAZuJuFA@mail.gmail.com> <201105260940.37035.jhb@freebsd.org>
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On Thu, May 26, 2011 at 3:40 PM, John Baldwin <jhb@freebsd.org> wrote:
> Ohh, you have two devices behind this bridge that have prefetch ranges.
>
> As a hack, can you try this:
>
> Index: pci_pci.c
> ===================================================================
> --- pci_pci.c (revision 222285)
> +++ pci_pci.c (working copy)
> @@ -162,8 +162,13 @@ pcib_write_windows(struct pcib_softc *sc, int mask
> {
> device_t dev;
> uint32_t val;
> + uint16_t cmd;
>
> dev = sc->dev;
> + cmd = pci_read_config(dev, PCIR_COMMAND, 2);
> + if (cmd & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN))
> + pci_write_config(dev, PCIR_COMMAND,
> + cmd & ~(PCIM_CMD_PORTEN | PCIM_CMD_MEMEN), 2);
> if (sc->io.valid && mask & WIN_IO) {
> val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
> if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
> @@ -192,6 +197,8 @@ pcib_write_windows(struct pcib_softc *sc, int mask
> pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
> pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
> }
> + if (cmd & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN))
> + pci_write_config(dev, PCIR_COMMAND, cmd, 2);
> }
>
> static void
> @@ -337,6 +344,9 @@ pcib_probe_windows(struct pcib_softc *sc)
> pci_read_config(dev, PCIR_PMLIMITL_1, 2));
> max = 0xffffffff;
> }
> + /* XXX: Testing hack */
> + if (device_get_unit(sc->sc_dev) == 1)
i'm assuming that "sc->sc_dev" should be "dev" (this fixes a compilation error).
> + sc->pmem.limit = 0xefffffff;
> pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
> RF_PREFETCHABLE, max);
> }
that seems to work!
btw, is my machine a test-pig for an upcoming change to the PCI bus driver?
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