Date: Fri, 10 May 2019 03:23:36 -0700 From: Mark Millard <marklmi@yahoo.com> To: Justin Hibbits <chmeeedalf@gmail.com>, FreeBSD PowerPC ML <freebsd-ppc@freebsd.org> Subject: Re: 970/PowerMac G5 cpudep_ap_bootstrap slb-related hangup *solved* . . . Message-ID: <C3272E01-41D8-4E4C-8F4B-CF9DC6E37B3D@yahoo.com> In-Reply-To: <2E7A0894-E5B0-4776-95F2-76B7EE0EE93C@yahoo.com> References: <2E7A0894-E5B0-4776-95F2-76B7EE0EE93C@yahoo.com>
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[Having removed all my prior investigatory material, I include
a svnlite diff that I've booted based on, a comparatively
minimal diff from the head -r347003 that I started from.]
On 2019-May-10, at 02:15, Mark Millard <marklmi at yahoo.com> wrote:
> [This continues a prior message, but I choose a new subject
> text for the testing that showed the kind of material working.]
>=20
> I have the slbtrap/handle_kernel_slb_spill working instead
> of hanging up when it has an slb-miss (and well as when there
> is no miss).
>=20
> In /usr/src/sys/powerpc/aim/mp_cpudep.c I moved the
> 970 code for HID0 and HID1 from cpudep_ap_setup, code
> that looks like,
>=20
> /* Set HIOR to 0 */
> __asm __volatile("mtspr 311,%0" :: "r"(0));
> powerpc_sync();
>=20
> /*
> * The 970 has strange rules about how to update HID =
registers.
> * See Table 2-3, 970MP manual
> *
> * Note: HID4 and HID5 restored already in
> * cpudep_ap_early_bootstrap()
> */
>=20
> __asm __volatile("mtasr %0; sync" :: "r"(0));
> #ifdef __powerpc64__
> __asm __volatile(" \
> sync; isync; =
\
> mtspr %1, %0; =
\
> mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
> mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
> sync; isync"
> :: "r"(bsp_state[0]), "K"(SPR_HID0));
> __asm __volatile("sync; isync; \
> mtspr %1, %0; mtspr %1, %0; sync; isync"
> :: "r"(bsp_state[1]), "K"(SPR_HID1));
> #else
> __asm __volatile(" \
> ld %0,0(%2); =
\
> sync; isync; =
\
> mtspr %1, %0; =
\
> mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
> mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
> sync; isync"
> : "=3Dr"(reg) : "K"(SPR_HID0), "b"(bsp_state));
> __asm __volatile("ld %0, 8(%2); sync; isync; \
> mtspr %1, %0; mtspr %1, %0; sync; isync"
> : "=3Dr"(reg) : "K"(SPR_HID1), "b"(bsp_state));
> #endif
>=20
> powerpc_sync();
>=20
> Here to? moved it to cpudep_ap_early_bootstrap, just before the
> code for HID4 and HID5, and I commented out 2 #if/endif lines:
>=20
> void
> cpudep_ap_early_bootstrap(void)
> {
> //#ifndef __powerpc64__
> register_t reg;
> //#endif
>=20
> switch (mfpvr() >> 16) {
> case IBM970:
> case IBM970FX:
> case IBM970MP:
>> .>.> INSERT CODE HERE <.<.<.
>=20
> /* Restore HID4 and HID5, which are necessary for the =
MMU */
>=20
> #ifdef __powerpc64__
> mtspr(SPR_HID4, bsp_state[2]); powerpc_sync(); isync();
> mtspr(SPR_HID5, bsp_state[3]); powerpc_sync(); isync();
> #else
> __asm __volatile("ld %0, 16(%2); sync; isync; \
> mtspr %1, %0; sync; isync;"
> : "=3Dr"(reg) : "K"(SPR_HID4), "b"(bsp_state));
> __asm __volatile("ld %0, 24(%2); sync; isync; \
> mtspr %1, %0; sync; isync;"
> : "=3Dr"(reg) : "K"(SPR_HID5), "b"(bsp_state));
> #endif
> powerpc_sync();
> break;
> . . .
>=20
> This does the initialization before cpudep_ap_bootstrap,
> instead of after.
>=20
> With things then sufficiently initialized for PSL_IR|PSL_DR
> code to doing things like pcpup->pc_curthread->td_pcb->
> that sometimes have slb misses, it boots fine,
> loading into the slb as needed. No more checkstop status
> (or whatever it was).
>=20
> I do not know if non-970 contexts should have similar
> changes in the ordering of initializations or not.
> But, clearly, the 970 family members do need such.
>=20
> I'm not claiming that other material from other notes
> that I sent out should be ignored, only that the above
> changes the observed failing behavior, and so is a big
> gain all by itself. And it is simple to do without
> other investigations that might be involved in the
> more overall context.
Of course, whitespace details, may not be well preserved
below. (The commenting out of the two #if/#endif lines
was unnecessary and is not done in the below.)
# svnlite diff /mnt/usr/src/sys/ | more
Index: /mnt/usr/src/sys/powerpc/aim/mp_cpudep.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
--- /mnt/usr/src/sys/powerpc/aim/mp_cpudep.c (revision 347003)
+++ /mnt/usr/src/sys/powerpc/aim/mp_cpudep.c (working copy)
@@ -68,6 +68,46 @@
case IBM970:
case IBM970FX:
case IBM970MP:
+ /* Set HIOR to 0 */
+ __asm __volatile("mtspr 311,%0" :: "r"(0));
+ powerpc_sync();
+
+ /*
+ * The 970 has strange rules about how to update HID =
registers.
+ * See Table 2-3, 970MP manual
+ *
+ * Note: HID4 and HID5 restored already in
+ * cpudep_ap_early_bootstrap()
+ */
+
+ __asm __volatile("mtasr %0; sync" :: "r"(0));
+ #ifdef __powerpc64__
+ __asm __volatile(" \
+ sync; isync; =
\
+ mtspr %1, %0; =
\
+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
+ sync; isync"=20
+ :: "r"(bsp_state[0]), "K"(SPR_HID0));
+ __asm __volatile("sync; isync; \
+ mtspr %1, %0; mtspr %1, %0; sync; isync"
+ :: "r"(bsp_state[1]), "K"(SPR_HID1));
+ #else
+ __asm __volatile(" \
+ ld %0,0(%2); =
\
+ sync; isync; =
\
+ mtspr %1, %0; =
\
+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
+ mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
+ sync; isync"=20
+ : "=3Dr"(reg) : "K"(SPR_HID0), "b"(bsp_state));
+ __asm __volatile("ld %0, 8(%2); sync; isync; \
+ mtspr %1, %0; mtspr %1, %0; sync; isync"
+ : "=3Dr"(reg) : "K"(SPR_HID1), "b"(bsp_state));
+ #endif
+
+ powerpc_sync();
+
/* Restore HID4 and HID5, which are necessary for the =
MMU */
=20
#ifdef __powerpc64__
@@ -314,45 +354,6 @@
case IBM970:
case IBM970FX:
case IBM970MP:
- /* Set HIOR to 0 */
- __asm __volatile("mtspr 311,%0" :: "r"(0));
- powerpc_sync();
-
- /*
- * The 970 has strange rules about how to update HID =
registers.
- * See Table 2-3, 970MP manual
- *
- * Note: HID4 and HID5 restored already in
- * cpudep_ap_early_bootstrap()
- */
-
- __asm __volatile("mtasr %0; sync" :: "r"(0));
- #ifdef __powerpc64__
- __asm __volatile(" \
- sync; isync; =
\
- mtspr %1, %0; =
\
- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
- sync; isync"=20
- :: "r"(bsp_state[0]), "K"(SPR_HID0));
- __asm __volatile("sync; isync; \
- mtspr %1, %0; mtspr %1, %0; sync; isync"
- :: "r"(bsp_state[1]), "K"(SPR_HID1));
- #else
- __asm __volatile(" \
- ld %0,0(%2); =
\
- sync; isync; =
\
- mtspr %1, %0; =
\
- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
- mfspr %0, %1; mfspr %0, %1; mfspr %0, %1; =
\
- sync; isync"=20
- : "=3Dr"(reg) : "K"(SPR_HID0), "b"(bsp_state));
- __asm __volatile("ld %0, 8(%2); sync; isync; \
- mtspr %1, %0; mtspr %1, %0; sync; isync"
- : "=3Dr"(reg) : "K"(SPR_HID1), "b"(bsp_state));
- #endif
-
- powerpc_sync();
break;
case IBMCELLBE:
#ifdef NOTYET /* Causes problems if in instruction =
stream on 970 */
=3D=3D=3D
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)
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