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Date:      Fri, 18 Sep 2020 19:52:53 +1000
From:      Jason Tubnor <jason@tubnor.net>
To:        vmaffione@freebsd.org, mmacy@freebsd.org, freebsd-net@freebsd.org,  erj@freebsd.org
Subject:   Fwd: Fragmentation of em(4) traffic (potentially others) when using vlanhwtag 12.2-BETA1
Message-ID:  <CACLnyCLwb0ERcai47e6rA5gpy6YaTNBeF35bm1ENVWycYniT5g@mail.gmail.com>
In-Reply-To: <CACLnyCJBa_g136m3_19FdVfb1xr3KHA_XmH_TeFo41HrUSofiw@mail.gmail.com>
References:  <CACLnyCJBa_g136m3_19FdVfb1xr3KHA_XmH_TeFo41HrUSofiw@mail.gmail.com>

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Cross-posting this issue that exists in the 12.2 cut.  Cheers.

---------- Forwarded message ---------
From: Jason Tubnor <jason@tubnor.net>
Date: Thu, 17 Sep 2020 at 10:49
Subject: Fragmentation of em(4) traffic (potentially others) when using
vlanhwtag 12.2-BETA1
To: freebsd-stable <freebsd-stable@freebsd.org>


Hi,

Doing some edge case testing with 12.2-BETA1, I have come across
fragmentation issues when vlanhwtag is enabled on the em(4) network device
(device listed below), causing IPSec traffic moving through a bhyve
'router-on-a-stick' to tank on send.  When you disable (-vlanhwtag), this
issue goes away and full speed send is possible.

Here is a snip of the traffic leaving for the internet after traversing
several VLANs through a bhyve router with vlanhwtag enabled:

10:09:54.173412 Dest.443 > Source.60901: . ack 12384 win 492 <nop,nop,sack
2 {10944:12235} {15373:18253} > (DF)
10:09:54.173936 Source.60901 > Dest.443: . 38413:39873(1460) ack 3837 win
1027 (frag 20228:1480@0+)
10:09:54.173937 Source > Dest: (frag 20228:1420@1480)

pciconf -vlbc

em0@pci0:0:25:0:        class=0x020000 card=0x308617aa chip=0x15028086
rev=0x04 hdr=0x00
    vendor     = 'Intel Corporation'
    device     = '82579LM Gigabit Network Connection (Lewisville)'
    class      = network
    subclass   = ethernet
    bar   [10] = type Memory, range 32, base 0xf7d00000, size 131072,
enabled
    bar   [14] = type Memory, range 32, base 0xf7d39000, size 4096, enabled
    bar   [18] = type I/O Port, range 32, base 0xf080, size 32, enabled
    cap 01[c8] = powerspec 2  supports D0 D3  current D0
    cap 05[d0] = MSI supports 1 message, 64 bit enabled with 1 message
    cap 13[e0] = PCI Advanced Features: FLR TP

Happy to provide further information if required and perform testing to
make sure the 12.2 release is polished.  Thanks,

Jason.



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