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Date:      Sat, 5 Oct 2013 10:18:50 -0700
From:      Adrian Chadd <adrian@freebsd.org>
To:        "freebsd-mips@freebsd.org" <freebsd-mips@freebsd.org>
Subject:   How's bus-space stuff supposed to work with superscalar MIPS?
Message-ID:  <CAJ-Vmo=PNSsW0eEAhc9LEDLswsj41VN%2BFX1vakQL=qGGdKqMuw@mail.gmail.com>

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Hi all,

I've been bringing up the AR9344 PHY and after a lot of digging, I
discovered that I can fix things by changing ARGE_WRITE() (ie, write to the
ethernet space registers) to:

bus_write_4();
bus_read_4();

.. to (what I'm guessing here) flush the write out before the next
instruction is run.

So, given this particular hilarity has shown up, what's the story with
doing IO accesses on a superscalar MIPS CPU? If it's going to kseg1, is it
somehow going to magically enforce ordering? Or am I right in thinking we
will need explicit barriers here?

I'd like to sneak this into the initial mips74k bringup support that I'm
going to commit to -HEAD soon.

Thanks,


-adrian



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