Date: Fri, 28 Aug 2015 10:15:49 +0300 From: Mihai Carabas <mihai.carabas@gmail.com> To: freebsd-arm@freebsd.org Subject: GIC - interrupts interpretation in DTS/FDT Message-ID: <CANg1yUtKG228sck71TOhOJ%2BHJ%2BdVdo5Pic0XLvqTPWw%2BUVzFcA@mail.gmail.com>
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Hi everyone, In the sys/arm/arm/gic.c there is a comment: "The hardware only supports active-high-level or rising-edge". From where is this deducted? I'm looking in the TRM for Cortex-A15 and there are some interrupts active-low-level. E.g.: "Virtual Timer event (PPI4) This is the event generated from the virtual timer and uses ID27. The interrupt is active-LOW level-sensitive." Thanks, Mihai
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