Date: Wed, 04 Dec 1996 08:20:09 -0800 From: Erich Boleyn <erich@uruk.org> To: Terje Normann Marthinussen <Terje.N.Marthinussen@cc.uit.no> Cc: smp@csn.net, smp@freebsd.org Subject: Re: Crashing on activating other CPUs Message-ID: <E0vVK3N-00025m-00@uruk.org> In-Reply-To: Your message of "Wed, 04 Dec 1996 16:27:12 %2B0100." <199612041527.QAA04593@slibo.cc.uit.no>
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Terje Normann Marthinussen <Terje.N.Marthinussen@cc.uit.no> writes: > Just for the record, I did a continue in DDB just after this. > Now I wonder, what happens when you get into DDB, do you get the > code that generated the trap, or do get the code that cpu0 was at when > you got the trap? > > Tried after a reboot: > cpunumber = 0 > instruction pointer = 0x8:0xf010d65b > stack pointer = 0x10:0xefbfff68 > frame pointer = 0x10:0xefbfff6c > code segment = base 0x0, limit 0xfffff, type 0x1b > = DPL 0, pres 1, def32 1, gran 1 > processor eflags = interrupt enabled, IOPL = 0 > current process = 6 (cpuidle1) > interrupt mask = > kernel: type 29 trap, code=0 ... The "type 29 trap" is the IPI used for SMP invalidates, I believe. I noticed that yours responds different than mine... did you hardwire the low-level to 2 cpus somewhere? -- Erich Stefan Boleyn \_ E-mail (preferred): <erich@uruk.org> Mad Genius wanna-be, CyberMuffin \__ (finger me for other stats) Web: http://www.uruk.org/~erich/ Motto: "I'll live forever or die trying"
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