Date: Mon, 23 Dec 1996 19:32:52 -0800 From: Erich Boleyn <erich@uruk.org> To: smp@freebsd.org Subject: Eureka (maybe...) (was -> Re: P6 problem idea ) Message-ID: <E0vcNbo-0003EK-00@uruk.org> In-Reply-To: Your message of "Sun, 22 Dec 1996 17:18:36 EST." <199612222218.RAA00490@dyson.iquest.net>
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Hi all. After seeing the messages about the Page Global bit being set, it seemed clear that it is at least some kind of problem, and the right entries aren't being flushed from the TLB, whether it was the major problem causing the crashes or not. I tried shutting off the page global stuff, and while I don't have a difinitively long run yet, it has run through 3 full kernel compiles with no crash yet. I'll run it for the next 1 1/2 hours and see if it lives through that. If so, I think we have our main culprit (I'll also post the (small) code change which synchronizes the CPUs on TLB shootdown before letting the sender continue). All that said, I'm very surprised that this *isn't* also a serious problem on the Pentium (the Pentium has the Page Global stuff as well... I didn't look to see if it is used for the Pentium as well as the Pentium Pro). -- Erich Stefan Boleyn \_ E-mail (preferred): <erich@uruk.org> Mad Genius wanna-be, CyberMuffin \__ (finger me for other stats) Web: http://www.uruk.org/~erich/ Motto: "I'll live forever or die trying"
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