Date: Thu, 22 Feb 2001 17:17:52 +0000 (GMT) From: Jean-Christophe Varaillon <jcv@vbc.net> To: jhay@FreeBSD.ORG Cc: julian@elischer.org, andy@tecc.co.uk, freebsd-net@FreeBSD.ORG Subject: Re: - N2d PCI & Driver Option - Message-ID: <Pine.BSF.4.10.10102221705060.73271-100000@brunel.uk1.vbc.net> In-Reply-To: <Pine.BSF.4.10.10102221437250.71700-100000@brunel.uk1.vbc.net>
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>On Thu, 22 Feb 2001, John Hay wrote:
>
> >On Thu, 22 Feb 2001,Jean-Christophe Varaillon wrote:
> >
> > +-------+ Serial Interface +-------------+
> > | cisco | | FreeBSD 4.1 |
> > | 3600 }----------{}-----------{ |
> > | | N2d | |
> > +-------+ card +-------------+
> > x.x.x.145 x.x.x.146
> >
> >
> > I need help to establish the communication between the router and the
> N2d
> > card (sr interface).
> >
> > The reason why it is not working is almost certainly in the driver.
> >
> > There are two kinds of cables used with these cards.
> > SDL Communications, the manufacturer, supplies x.21 cables
> > that have the input clock pin tied to the output clock pin.
> >
> > Normaly I should be able to use a driver option to tell the
> > HDLC chip to pass the signal through to the output clock pin.
> >
> > If this isn't configured, there is no data out clock, so the card
> > doesn't work.
> >
> > Could you, please, tell me how to configure it ?
>
> You are a little bit out of luck. On the ISA cards you can configure
> the clock settings with the flags option in the kernel config file.
> You can't do it with the PCI cards though, because none of that
> config line is used. The reason is that on the ISA cards there were
> no way for the driver to figure out what kind of cable was attached.
> On the PCI cards there are some registers that you can read to get
> that info. The driver will use 2 seperate clocks for V.35 cables
> and a combined clock for X.21 cables. If you want to play with it,
> look in /usr/src/sys/i386/isa/if_sr.c almost at the end of
> srattach_pci(). You will see either SR_FLAGS_EXT_SEP_CLK or
> SR_FLAGS_EXT_CLK gets assigned to sc->clk_cfg. If you search
> further into the file for SR_FLAGS_EXT_CLK, you will find the
> place where the actual magic is done to select the clocks.
>
> John
This is now working properly, to adapt the driver if_sr.c to my case,
a global variable (My_Case) has to be added in
sr_init_msci(structsr_softc *sc):
---------------------------------------------------------
sr_init_msci(struct sr_softc *sc)
{
int portndx; /* on-board port number */
u_int mcr_v; /* contents of modem control */
u_int *fecrp; /* pointer for PCI's MCR i/o */
struct sr_hardc *hc = sc->hc;
msci_channel *msci = &hc->sca->msci[sc->scachan];
#ifdef N2_TEST_SPEED
int br_v; /* contents for BR divisor */
int etcndx; /* index into ETC table */
int fifo_v, gotspeed; /* final tabled speed found */
int tmc_v; /* timer control register */
int wanted; /* speed (bitrate) wanted... */
struct rate_line *rtp;
#endif
portndx = sc->scachan;
#if BUGGY > 0
printf("sr: sr_init_msci( sc=%08x)\n", sc);
#endif
SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RESET);
SRC_PUT8(hc->sca_base, msci->md0, SCA_MD0_CRC_1 |
SCA_MD0_CRC_CCITT |
SCA_MD0_CRC_ENABLE |
SCA_MD0_MODE_HDLC);
SRC_PUT8(hc->sca_base, msci->md1, SCA_MD1_NOADDRCHK);
SRC_PUT8(hc->sca_base, msci->md2, SCA_MD2_DUPLEX | SCA_MD2_NRZ);
/*
* According to the manual I should give a reset after changing
the
* mode registers.
*/
SRC_PUT8(hc->sca_base, msci->cmd, SCA_CMD_RXRESET);
SRC_PUT8(hc->sca_base, msci->ctl, SCA_CTL_IDLPAT |
SCA_CTL_UDRNC |
SCA_CTL_RTS);
/*
* XXX Later we will have to support different clock settings.
*/
#ifdef My_Case
printf ("vbcnet hack writing 0x%x\n", SCA_TXS_CLK_RX) ;
SRC_PUT8(hc->sca_base, msci->rxs, 0);
SRC_PUT8(hc->sca_base, msci->txs, SCA_TXS_CLK_RX);
#else
switch (sc->clk_cfg) {
default:
#if BUGGY > 0
.
.
.
-------------------------------------------------------------
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