Skip site navigation (1)Skip section navigation (2)
Date:      Fri, 11 Apr 1997 09:46:26 -0700 (PDT)
From:      John Utz <spaz@u.washington.edu>
To:        Michael Hancock <michaelh@cet.co.jp>
Cc:        Darren Reed <avalon@coombs.anu.edu.au>, Terry Lambert <terry@lambert.org>, hackers@freebsd.org
Subject:   Re: 430TX ?
Message-ID:  <Pine.OSF.3.95.970411094154.31682B-100000@becker2.u.washington.edu>
In-Reply-To: <Pine.SV4.3.95.970411165742.6102A-100000@parkplace.cet.co.jp>

next in thread | previous in thread | raw e-mail | index | archive | help
Hi; funny u should mention this, we were just talking about this in my
RTOS class today....

On Fri, 11 Apr 1997, Michael Hancock wrote:
> > > 
> > > > Is the 430TX chipset recognised/supported yet ?
> > > 
> > > Is this a PCI chipset?
> > 
> > Yes, the "latest" from Intel (advertised as faster than HX and VX).
> 
> While we're talking about Intel, they claim that they're focusing more on
> memory bandwidth these days and the Pentium II has some kind of dual bus
> architecture that makes a significant performance difference.

	my instructor claims they separated the cache into instruction
cache and data-cache.....a previously 'discredited' architecture known to
the ancients as 'harvard architecture ( howard aiken )' as opposed to the
traditional 'von neumann' or 'princeton' architecture.... is cache space
relatively cheap these days?

john 

*******************************************************************************
 John Utz	spaz@u.washington.edu
	idiocy is the impulse function in the convolution of life




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?Pine.OSF.3.95.970411094154.31682B-100000>