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Date:      Mon, 15 Jan 2001 19:42:11 -0800 (PST)
From:      John Baldwin <jhb@FreeBSD.org>
To:        John Baldwin <jhb@FreeBSD.org>
Cc:        cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org
Subject:   RE: cvs commit: src/sys/i386/include atomic.h
Message-ID:  <XFMail.010115194211.jhb@FreeBSD.org>
In-Reply-To: <XFMail.010115112824.jhb@FreeBSD.org>

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On 15-Jan-01 John Baldwin wrote:
> 
> On 14-Jan-01 John Baldwin wrote:
>> jhb         2001/01/14 01:55:21 PST
>> 
>>   Modified files:
>>     sys/i386/include     atomic.h 
>>   Log:
>>   Fix the atomic_load_acq() and atomic_store_rel() functions to properly
>>   implement memory fences for the 486+.  The 386 still uses versions w/o
>>   memory fences as all operations on the 386 are not program ordered.
>>   The 386 versions are not MP safe.
> 
> This has really helped my SMP stability here locally.  The quad xeon has now
> built 4 releases back to back w/o any problems.  It never made it through 2
> without locking up before.

Well, I've tried to stress test all my SMP test machines today.  No lockups so
far.  The quad xeon did have a problem with a -j 1024 world though (make got a
bus error).  No console messages though so not sure what that was about.  My
dual p3-600 had been locking up really bad this past week, but it has had 0
problems today with this fix.  If other people with SMP can test -current as of
this patch and report any lockups, that would be helpful.

-- 

John Baldwin <jhb@FreeBSD.org> -- http://www.FreeBSD.org/~jhb/
PGP Key: http://www.baldwin.cx/~john/pgpkey.asc
"Power Users Use the Power to Serve!"  -  http://www.FreeBSD.org/


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