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Date:      Sat, 16 Sep 2023 09:46:38 +0200
From:      Sebastian Huber <sebastian.huber@embedded-brains.de>
To:        hackers@freebsd.org
Subject:   Remove timecounter tc_counter_mask member?
Message-ID:  <bc1a7b28-5e7b-4ee6-aae8-f95adc65fc76@embedded-brains.de>
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Hello,

the timecounter structure contains a tc_counter_mask which enables=20
support for time counters implementing less than 32-bits:

struct timecounter {
	timecounter_get_t	*tc_get_timecount;
#ifndef __rtems__
		/*
		 * This function reads the counter.  It is not required to
		 * mask any unimplemented bits out, as long as they are
		 * constant.
		 */
	uint32_t 		tc_counter_mask;
		/* This mask should mask off any unimplemented bits. */
	[...]
};

In the FreeBSD main branch

sys/x86/x86/tsc.c:      .tc_counter_mask =3D              ~0u,
sys/x86/x86/pvclock.c:  pvc->tc.tc_counter_mask =3D ~0U;
sys/x86/isa/clock.c:            sc->tc.tc_counter_mask =3D 0xffff;
sys/arm/ti/am335x/am335x_dmtimer.c:     sc->func.tc.tc_counter_mask   =3D=
 ~0u;
sys/arm/ti/am335x/am335x_dmtpps.c:      sc->tc.tc_counter_mask   =3D ~0u;
sys/arm/allwinner/a10_timer.c:  .tc_counter_mask   =3D ~0u,
sys/arm/allwinner/a10_timer.c:  .tc_counter_mask   =3D ~0u,
sys/arm/arm/generic_timer.c:    .tc_counter_mask   =3D ~0u,
sys/arm/arm/sp804.c:    sc->tc.tc_counter_mask =3D ~0u;
sys/arm/arm/mpcore_timer.c:     .tc_counter_mask   =3D ~0u,
sys/arm/broadcom/bcm2835/bcm2835_systimer.c:    .tc_counter_mask   =3D ~0=
u,
sys/arm/mv/timer.c:     .tc_counter_mask =3D ~0u,
sys/arm/freescale/imx/imx_gpt.c:        .tc_counter_mask   =3D ~0u,
sys/arm/freescale/imx/imx_epit.c:       sc->tc.tc_counter_mask  =3D=20
0xffffffff;
sys/powerpc/powerpc/clock.c:    .tc_counter_mask =3D              ~0u,
sys/dev/acpica/acpi_hpet.c:             sc->tc.tc_counter_mask =3D ~0u,
sys/dev/acpica/acpi_timer.c:    acpi_timer_timecounter.tc_counter_mask =3D=
=20
0xffffffff;
sys/dev/acpica/acpi_timer.c:    acpi_timer_timecounter.tc_counter_mask =3D=
=20
0x00ffffff;
sys/dev/xen/timer/xen_timer.c:  sc->tc.tc_counter_mask =3D ~0u;
sys/dev/hyperv/vmbus/amd64/hyperv_machdep.c:    .tc_counter_mask=20
=3D 0xffffffff,
sys/dev/hyperv/vmbus/x86/hyperv_x86.c:  .tc_counter_mask =3D 0xffffffff,
sys/riscv/riscv/timer.c:        .tc_counter_mask   =3D ~0u,

only two timecounters use a mask other than 0xffffffff. These are

sys/x86/isa/clock.c:            sc->tc.tc_counter_mask =3D 0xffff;

and

sys/dev/acpica/acpi_timer.c-    if (AcpiGbl_FADT.Flags &=20
ACPI_FADT_32BIT_TIMER)
sys/dev/acpica/acpi_timer.c:    acpi_timer_timecounter.tc_counter_mask =3D=
=20
0xffffffff;
sys/dev/acpica/acpi_timer.c-    else
sys/dev/acpica/acpi_timer.c:    acpi_timer_timecounter.tc_counter_mask =3D=
=20
0x00ffffff;

Is the sys/x86/isa/clock.c still used? Are there chips on the market=20
with 24-bit ACPI timers?

Instead of using the mask, we could instead left shift the frequency and=20
the returned count by 16 (sys/x86/isa/clock.c) or 8=20
(sys/dev/acpica/acpi_timer.c). Then we could remove the tc_counter_mask=20
member to simplify some calculations such as:

/*
  * Return the difference between the timehands' counter value now and wh=
at
  * was when we copied it to the timehands' offset_count.
  */
static __inline uint32_t
tc_delta(struct timehands *th)
{
	struct timecounter *tc;

	tc =3D th->th_counter;
	return ((tc->tc_get_timecount(tc) - th->th_offset_count) &
	    tc->tc_counter_mask);
}

Would such a change be acceptable for FreeBSD?

Kind regards,
	Sebastian

--=20
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