Date: Mon, 13 Apr 2009 23:01:23 +0200 From: Ivan Voras <ivoras@freebsd.org> To: freebsd-arch@freebsd.org Subject: Re: Simple #define for cache line size Message-ID: <gs0984$i3i$1@ger.gmane.org> In-Reply-To: <alpine.BSF.2.00.0904111700241.19879@fledge.watson.org> References: <alpine.BSF.2.00.0904111700241.19879@fledge.watson.org>
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[-- Attachment #1 --] Robert Watson wrote: > --- i386/include/param.h (revision 190941) > +++ i386/include/param.h (working copy) > @@ -74,6 +74,10 @@ > #define ALIGNBYTES _ALIGNBYTES > #define ALIGN(p) _ALIGN(p) > > +#ifndef CACHE_LINE_SIZE > +#define CACHE_LINE_SIZE 64 > +#endif Wouldn't it be better to continue the cpu I486_CPU cpu I586_CPU cpu I686_CPU series of defines in kernel configuration and define alignment per CPU architecture? I guess it depends on the trends - are cache lines expected to change in the near future? :) [-- Attachment #2 --] -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (MingW32) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iEYEARECAAYFAknjqCgACgkQldnAQVacBcigHgCdHhI3Ju25GNN/MN2ZDv0rfAmP uMoAnRZKeOyJwbKxA5cjb29kRhs0wdxW =2wxO -----END PGP SIGNATURE-----
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