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Date:      Tue, 20 Apr 2010 19:53:23 +0530
From:      "C. Jayachandran" <c.jayachandran@gmail.com>
To:        Rui Paulo <rpaulo@freebsd.org>
Cc:        freebsd-mips@freebsd.org
Subject:   Re: [PATCH] Account RMI XLR interrupts
Message-ID:  <y2o98a59be81004200723zbab2a5a5y1556b8106a3195f6@mail.gmail.com>
In-Reply-To: <g2u98a59be81004200718md331d3b1g5bff1c764b58fc73@mail.gmail.com>
References:  <BAAA25BC-6094-4B5B-9C83-A330933EBA51@freebsd.org> <g2u98a59be81004200718md331d3b1g5bff1c764b58fc73@mail.gmail.com>

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Please ignore the first part of the mail about array size, I seem to
have missed the definition in rmi files.

JC.

On Tue, Apr 20, 2010 at 7:48 PM, C. Jayachandran
<c.jayachandran@gmail.com> wrote:
> On Tue, Apr 20, 2010 at 5:06 PM, Rui Paulo <rpaulo@freebsd.org> wrote:
>> Hi,
>> The following patch accounts interrupts on the XLR and makes vmstat -i and systat work display useful data. I think the commented out atomic inc can go away, but I'm not sure.
>>
>> Here's an example:
>>
>> $ vmstat -i
>> interrupt                          total       rate
>> int16:                             56118        984
>> int17:                               214          3
>> Total                              56332        988
>>
>> int16 is the timer and int17 is the network interface (rge1).
>
> Are you sure that the mips_intr_events array has the size to hold all
> the XLR interrupts?  The XLR has a slightly different scheme (with
> COP0 EIRR EIMR registers) and can have upto 64 interrupts.
>
> A mechanism to unify the interrupt, and handling the XLR PIC may be a good idea.
>
> The network packets come on MSGRING interrupt - only link status etc
> will come on the GMAC interrupt.
>
> JC.
>
>
>> Index: intr_machdep.c
>> ===================================================================
>> --- intr_machdep.c      (revision 206791)
>> +++ intr_machdep.c      (working copy)
>> @@ -157,28 +157,17 @@
>>        for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) {
>>                if ((eirr & (1ULL << i)) == 0)
>>                        continue;
>>                ie = mips_intr_events[i];
>>                /* atomic_add_long(mih->cntp, 1); */
>> +               /* Don't account special IRQs */
>> +               switch (i) {
>> +               case IRQ_IPI:
>> +               case IRQ_MSGRING:
>> +                       break;
>> +               default:
>> +                       mips_intrcnt_inc(mips_intr_counters[i]);
>> +               }
>>
>>                write_c0_eirr64(1ULL << i);
>>                pic_ack(i, 0);
>>
>> Regards,
>> --
>> Rui Paulo
>



-- 
C. Jayachandran    c.jayachandran@gmail.com



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