Date: Wed, 20 Feb 2002 13:36:03 +0900 From: Hidetoshi Shimokawa <simokawa@sat.t.u-tokyo.ac.jp> To: Alan Clegg <alan@clegg.com> Cc: freebsd-firewire@freebsd.org Subject: Re: Status of adding Firewire support to kernel? Message-ID: <ybs664sydl8.wl@ett.sat.t.u-tokyo.ac.jp> In-Reply-To: <20020219210222.A23686@shell.wetworks.org> References: <5.1.0.14.2.20020218111417.023cb090@pop.earthlink.net> <ybsk7taxi5a.wl@ett.sat.t.u-tokyo.ac.jp> <20020219210222.A23686@shell.wetworks.org>
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At Tue, 19 Feb 2002 21:02:22 -0500,
Alan Clegg wrote:
>
> [1 <text/plain; us-ascii (quoted-printable)>]
> Unless the network is lying to me again, Hidetoshi Shimokawa said:
>
> > I don't think it's production level. But it's worth to try.
> > I believe most of the OHCI chips are supported by the fwohci code,
> > SBP devices which has only one LUN should be detected correctly by sbp
> > code. You may need some quirks in CAM layer.
> >
> > Give me a feedback.
>
> Got it working with my Sony Vaio PCG-C1VN with the following:
>
> fwohci0: <Texas Instruments TSB43AA22> mem 0xfc018000-0xfc01bfff,0xfc01d000-0xfc01d7ff irq 9 at device 8.0 on pci0
> fwohci0: PCI bus latency was changing to 250.
> cache size 8.
> fwohciinit -1
> fwohci0: No. of Isochronous channel is 4.
> fwohci0: cannot read phy
^^^^^^^^^^^^^^^^
> fwohci0: Link 1394 only S100, 0 ports.
^^^^^^^^^
This should be a problem.
Could you increase time of DELAY() in fwohci.c and try again?
/*
* probe PHY parameters
* 0. to prove PHY version, whether compliance of 1394a.
* 1. to probe maximum speed supported by the PHY and
* number of port supported by core-logic.
* It is not actually available port on your PC .
*/
/* Wait a while */
DELAY(100);
^^^^^^^^^^^
reg = fwphy_rddata(sc, FW_PHY_SPD_REG);
/\ Hidetoshi Shimokawa
\/ simokawa@sat.t.u-tokyo.ac.jp
PGP public key: http://www.sat.t.u-tokyo.ac.jp/~simokawa/pgp.html
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