Date: Mon, 7 Mar 2005 20:48:23 GMT From: John Baldwin <jhb@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 72657 for review Message-ID: <200503072048.j27KmNlE023126@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=72657 Change 72657 by jhb@jhb_slimer on 2005/03/07 20:47:43 Only clobber memory for acq variants. Note that variants with no membar at all map to acq on ia64, so only explicit rel variants lose the clobber with this change. Affected files ... .. //depot/projects/smpng/sys/ia64/include/atomic.h#4 edit Differences ... ==== //depot/projects/smpng/sys/ia64/include/atomic.h#4 (text+ko) ==== @@ -37,13 +37,13 @@ /* * Everything is built out of cmpxchg. */ -#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret) \ +#define IA64_CMPXCHG(sz, sem, p, cmpval, newval, ret, clobber) \ __asm __volatile ( \ "mov ar.ccv=%2;;\n\t" \ "cmpxchg" #sz "." #sem " %0=%4,%3,ar.ccv\n\t" \ : "=r" (ret), "=m" (*p) \ : "r" (cmpval), "r" (newval), "m" (*p) \ - : "memory") + : clobber) /* * Some common forms of cmpxch. @@ -52,7 +52,7 @@ ia64_cmpxchg_acq_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval) { uint32_t ret; - IA64_CMPXCHG(4, acq, p, cmpval, newval, ret); + IA64_CMPXCHG(4, acq, p, cmpval, newval, ret, "memory"); return (ret); } @@ -60,7 +60,7 @@ ia64_cmpxchg_rel_32(volatile uint32_t* p, uint32_t cmpval, uint32_t newval) { uint32_t ret; - IA64_CMPXCHG(4, rel, p, cmpval, newval, ret); + IA64_CMPXCHG(4, rel, p, cmpval, newval, ret, ""); return (ret); } @@ -68,7 +68,7 @@ ia64_cmpxchg_acq_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval) { uint64_t ret; - IA64_CMPXCHG(8, acq, p, cmpval, newval, ret); + IA64_CMPXCHG(8, acq, p, cmpval, newval, ret, "memory"); return (ret); } @@ -76,7 +76,7 @@ ia64_cmpxchg_rel_64(volatile uint64_t* p, uint64_t cmpval, uint64_t newval) { uint64_t ret; - IA64_CMPXCHG(8, rel, p, cmpval, newval, ret); + IA64_CMPXCHG(8, rel, p, cmpval, newval, ret, ""); return (ret); } @@ -112,7 +112,7 @@ ia64_st_rel_##width(volatile uint##width##_t* p, uint##width##_t v) \ { \ __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \ - : "r" (v) : "memory"); \ + : "r" (v)); \ } \ \ static __inline void \ @@ -120,7 +120,7 @@ uint##width##_t v) \ { \ __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \ - : "r" (v) : "memory"); \ + : "r" (v)); \ } \ \ static __inline void \ @@ -128,7 +128,7 @@ uint##width##_t v) \ { \ __asm __volatile ("st" size ".rel %0=%1" : "=m" (*p) \ - : "r" (v) : "memory"); \ + : "r" (v)); \ } ATOMIC_STORE_LOAD(char, 8, "1") @@ -145,7 +145,7 @@ type old, ret; \ do { \ old = *p; \ - IA64_CMPXCHG(sz, acq, p, old, old op v, ret); \ + IA64_CMPXCHG(sz, acq, p, old, old op v, ret, "memory");\ } while (ret != old); \ return (old); \ } \ @@ -156,7 +156,7 @@ type old, ret; \ do { \ old = *p; \ - IA64_CMPXCHG(sz, rel, p, old, old op v, ret); \ + IA64_CMPXCHG(sz, rel, p, old, old op v, ret, "");\ } while (ret != old); \ return (old); \ }
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