Date: Fri, 23 Apr 2010 08:49:16 +0000 (UTC) From: Juli Mallett <jmallett@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r207104 - in user/jmallett/octeon/sys/mips: cavium cavium/octe conf Message-ID: <201004230849.o3N8nG0F048497@svn.freebsd.org>
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Author: jmallett Date: Fri Apr 23 08:49:16 2010 New Revision: 207104 URL: http://svn.freebsd.org/changeset/base/207104 Log: o) Add a bus, ciu, which provides access to the Octeon interrupt controller to devices that hang off of it and which passes everything else through to nexus. It should likely be a nexus subclass instead of a bus in the hierarchy, but this will do for now. o) While here fix octe build. Added: user/jmallett/octeon/sys/mips/cavium/ciu.c Modified: user/jmallett/octeon/sys/mips/cavium/files.octeon1 user/jmallett/octeon/sys/mips/cavium/octe/ethernet.c user/jmallett/octeon/sys/mips/cavium/octe/octebus.c user/jmallett/octeon/sys/mips/conf/OCTEON1.hints Added: user/jmallett/octeon/sys/mips/cavium/ciu.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jmallett/octeon/sys/mips/cavium/ciu.c Fri Apr 23 08:49:16 2010 (r207104) @@ -0,0 +1,332 @@ +/*- + * Copyright (c) 2010 Juli Mallett <jmallett@FreeBSD.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD: user/jmallett/octeon/sys/mips/cavium/ciu.c 206986 2010-04-21 07:28:57Z jmallett $"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/interrupt.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/rman.h> +#include <sys/malloc.h> + +#include <machine/bus.h> + +#include <contrib/octeon-sdk/cvmx.h> +#include <contrib/octeon-sdk/cvmx-interrupt.h> + +/* + * This bus sits between devices/buses and nexus and handles CIU interrupts + * and passes everything else through. It should really be a nexus subclass + * or something, but for now this will be sufficient. + */ + +#define CIU_IRQ_HARD (0) + +#define CIU_IRQ_EN0_BEGIN CVMX_IRQ_WORKQ0 +#define CIU_IRQ_EN0_END (CVMX_IRQ_BOOTDMA + 1) + +#define CIU_IRQ_EN1_BEGIN CVMX_IRQ_WDOG0 +#define CIU_IRQ_EN1_END (CVMX_IRQ_WDOG15 + 1) + +struct ciu_softc { + struct rman irq_rman; + struct resource *ciu_irq; +}; + +static struct intr_event *ciu_en0_intr_events[CIU_IRQ_EN0_END - CIU_IRQ_EN0_BEGIN]; +static struct intr_event *ciu_en1_intr_events[CIU_IRQ_EN1_END - CIU_IRQ_EN1_BEGIN]; + +static int ciu_probe(device_t); +static int ciu_attach(device_t); +static struct resource *ciu_alloc_resource(device_t, device_t, int, int *, + u_long, u_long, u_long, u_int); +static int ciu_setup_intr(device_t, device_t, struct resource *, + int, driver_filter_t *, driver_intr_t *, + void *, void **); +static void ciu_hinted_child(device_t, const char *, int); + +static void ciu_en0_intr_mask(void *); +static void ciu_en0_intr_unmask(void *); + +static void ciu_en1_intr_mask(void *); +static void ciu_en1_intr_unmask(void *); + +static int ciu_intr(void *); + +static int +ciu_probe(device_t dev) +{ + if (device_get_unit(dev) != 0) + return (ENXIO); + + device_set_desc(dev, "Cavium Octeon Central Interrupt Unit"); + return (0); +} + +static int +ciu_attach(device_t dev) +{ + struct ciu_softc *sc; + int error; + int rid; + + sc = device_get_softc(dev); + + rid = 0; + sc->ciu_irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, CIU_IRQ_HARD, + CIU_IRQ_HARD, 1, RF_ACTIVE); + if (sc->ciu_irq == NULL) { + device_printf(dev, "could not allocate irq%d\n", CIU_IRQ_HARD); + return (ENXIO); + } + + error = bus_setup_intr(dev, sc->ciu_irq, INTR_TYPE_MISC, ciu_intr, + NULL, sc, NULL); + if (error != 0) { + device_printf(dev, "bus_setup_intr failed: %d\n", error); + return (error); + } + + sc->irq_rman.rm_type = RMAN_ARRAY; + sc->irq_rman.rm_descr = "CIU IRQ"; + + error = rman_init(&sc->irq_rman); + if (error != 0) + return (error); + + /* + * We have two contiguous IRQ regions, use a single rman. + */ + error = rman_manage_region(&sc->irq_rman, CIU_IRQ_EN0_BEGIN, + CIU_IRQ_EN1_END); + if (error != 0) + return (error); + + bus_generic_probe(dev); + bus_generic_attach(dev); + + return (0); +} + +static struct resource * +ciu_alloc_resource(device_t bus, device_t child, int type, int *rid, + u_long start, u_long end, u_long count, u_int flags) +{ + struct resource *res; + struct ciu_softc *sc; + + sc = device_get_softc(bus); + + switch (type) { + case SYS_RES_IRQ: + break; + default: + return (bus_alloc_resource(device_get_parent(bus), type, rid, + start, end, count, flags)); + } + + /* + * One interrupt at a time for now. + */ + if (start != end) + return (NULL); + + res = rman_reserve_resource(&sc->irq_rman, start, end, count, flags, + child); + if (res != NULL) + return (res); + + return (NULL); +} + +static int +ciu_setup_intr(device_t bus, device_t child, struct resource *res, int flags, + driver_filter_t *filter, driver_intr_t *intr, void *arg, + void **cookiep) +{ + struct intr_event *event, **eventp; + void (*mask_func)(void *); + void (*unmask_func)(void *); + int error; + int irq; + + irq = rman_get_start(res); + if (irq < CIU_IRQ_EN0_END) { + eventp = &ciu_en0_intr_events[irq - CIU_IRQ_EN0_BEGIN]; + mask_func = ciu_en0_intr_mask; + unmask_func = ciu_en0_intr_unmask; + } else { + eventp = &ciu_en1_intr_events[irq - CIU_IRQ_EN1_BEGIN]; + mask_func = ciu_en1_intr_mask; + unmask_func = ciu_en1_intr_unmask; + } + + if ((event = *eventp) == NULL) { + error = intr_event_create(eventp, (void *)(uintptr_t)irq, 0, + irq, mask_func, unmask_func, NULL, NULL, "int%d", irq); + if (error != 0) + return (error); + + event = *eventp; + + unmask_func((void *)(uintptr_t)irq); + } + + intr_event_add_handler(event, device_get_nameunit(child), + filter, intr, arg, intr_priority(flags), flags, cookiep); + + return (0); +} + +static void +ciu_hinted_child(device_t bus, const char *dname, int dunit) +{ + BUS_ADD_CHILD(bus, 0, dname, dunit); +} + +static void +ciu_en0_intr_mask(void *arg) +{ + uint64_t mask; + int irq; + + irq = (uintptr_t)arg; + mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2)); + mask &= ~(1ull << (irq - CIU_IRQ_EN0_BEGIN)); + cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), mask); +} + +static void +ciu_en0_intr_unmask(void *arg) +{ + uint64_t mask; + int irq; + + irq = (uintptr_t)arg; + mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2)); + mask |= 1ull << (irq - CIU_IRQ_EN0_BEGIN); + cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2), mask); +} + +static void +ciu_en1_intr_mask(void *arg) +{ + uint64_t mask; + int irq; + + irq = (uintptr_t)arg; + mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2)); + mask &= ~(1ull << (irq - CIU_IRQ_EN1_BEGIN)); + cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), mask); +} + +static void +ciu_en1_intr_unmask(void *arg) +{ + uint64_t mask; + int irq; + + irq = (uintptr_t)arg; + mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2)); + mask |= 1ull << (irq - CIU_IRQ_EN1_BEGIN); + cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2), mask); +} + +static int +ciu_intr(void *arg) +{ + struct ciu_softc *sc; + uint64_t en0_sum, en1_sum; + uint64_t en0_mask, en1_mask; + int irq_index; + int error; + + sc = arg; + (void)sc; + + en0_sum = cvmx_read_csr(CVMX_CIU_INTX_SUM0(cvmx_get_core_num()*2)); + en1_sum = cvmx_read_csr(CVMX_CIU_INT_SUM1); + + en0_mask = cvmx_read_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num()*2)); + en1_mask = cvmx_read_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num()*2)); + + en0_sum &= en0_mask; + en1_sum &= en1_mask; + + if (en0_sum == 0 && en1_sum == 0) + return (FILTER_STRAY); + + irq_index = 0; + for (irq_index = 0; en0_sum != 0; irq_index++, en0_sum >>= 1) { + if ((en0_sum & 1) == 0) + continue; + + error = intr_event_handle(ciu_en0_intr_events[irq_index], NULL); + if (error != 0) + printf("%s: stray en0 irq%d\n", __func__, irq_index); + } + + irq_index = 0; + for (irq_index = 0; en1_sum != 0; irq_index++, en1_sum >>= 1) { + if ((en1_sum & 1) == 0) + continue; + + error = intr_event_handle(ciu_en1_intr_events[irq_index], NULL); + if (error != 0) + printf("%s: stray en1 irq%d\n", __func__, irq_index); + } + + return (FILTER_HANDLED); +} + +static device_method_t ciu_methods[] = { + DEVMETHOD(device_probe, ciu_probe), + DEVMETHOD(device_attach, ciu_attach), + + DEVMETHOD(bus_alloc_resource, ciu_alloc_resource), + DEVMETHOD(bus_activate_resource,bus_generic_activate_resource), + DEVMETHOD(bus_setup_intr, ciu_setup_intr), + DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), + + DEVMETHOD(bus_add_child, bus_generic_add_child), + DEVMETHOD(bus_hinted_child, ciu_hinted_child), + + { 0, 0 } +}; + +static driver_t ciu_driver = { + "ciu", + ciu_methods, + sizeof(struct ciu_softc), +}; +static devclass_t ciu_devclass; +DRIVER_MODULE(ciu, nexus, ciu_driver, ciu_devclass, 0, 0); Modified: user/jmallett/octeon/sys/mips/cavium/files.octeon1 ============================================================================== --- user/jmallett/octeon/sys/mips/cavium/files.octeon1 Fri Apr 23 08:46:42 2010 (r207103) +++ user/jmallett/octeon/sys/mips/cavium/files.octeon1 Fri Apr 23 08:49:16 2010 (r207104) @@ -2,6 +2,7 @@ # Octeon Support Files # mips/cavium/asm_octeon.S optional smp +mips/cavium/ciu.c standard mips/cavium/obio.c optional uart mips/cavium/octeon_ebt3000_cf.c optional cf mips/cavium/octeon_machdep.c standard Modified: user/jmallett/octeon/sys/mips/cavium/octe/ethernet.c ============================================================================== --- user/jmallett/octeon/sys/mips/cavium/octe/ethernet.c Fri Apr 23 08:46:42 2010 (r207103) +++ user/jmallett/octeon/sys/mips/cavium/octe/ethernet.c Fri Apr 23 08:49:16 2010 (r207104) @@ -87,7 +87,7 @@ TUNABLE_INT("hw.octe.always_use_pow", &a "\t\tthis option." */ char pow_send_list[128] = ""; -TUNABLE_STRING("hw.octe.pow_send_list", pow_send_list, sizeof pow_send_list); +TUNABLE_STR("hw.octe.pow_send_list", pow_send_list, sizeof pow_send_list); /* "\t\tComma separated list of ethernet devices that should use the\n" "\t\tPOW for transmit instead of the actual ethernet hardware. This\n" Modified: user/jmallett/octeon/sys/mips/cavium/octe/octebus.c ============================================================================== --- user/jmallett/octeon/sys/mips/cavium/octe/octebus.c Fri Apr 23 08:46:42 2010 (r207103) +++ user/jmallett/octeon/sys/mips/cavium/octe/octebus.c Fri Apr 23 08:49:16 2010 (r207104) @@ -73,7 +73,7 @@ static driver_t octebus_driver = { static devclass_t octebus_devclass; -DRIVER_MODULE(octebus, nexus, octebus_driver, octebus_devclass, 0, 0); +DRIVER_MODULE(octebus, ciu, octebus_driver, octebus_devclass, 0, 0); static void octebus_identify(driver_t *drv, device_t parent) Modified: user/jmallett/octeon/sys/mips/conf/OCTEON1.hints ============================================================================== --- user/jmallett/octeon/sys/mips/conf/OCTEON1.hints Fri Apr 23 08:46:42 2010 (r207103) +++ user/jmallett/octeon/sys/mips/conf/OCTEON1.hints Fri Apr 23 08:49:16 2010 (r207104) @@ -2,6 +2,7 @@ # device.hints # All these values are complete nonsense... hw.uart.console="io:0x1" +hint.ciu.0.at="nexus" hint.obio.0.at="nexus" hint.obio.0.maddr="0x1" hint.obio.0.msize="0x1"
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