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Date:      Thu, 28 Jan 2010 22:42:19 -0800
From:      Juli Mallett <jmallett@FreeBSD.org>
To:        Randall Stewart <rrs@lakerest.net>
Cc:        freebsd-mips@freebsd.org, Neel Natu <neelnatu@gmail.com>
Subject:   Re: Code review: groundwork for SMP
Message-ID:  <eaa228be1001282242q1f78fff2w9804da6cdadb3d1f@mail.gmail.com>
In-Reply-To: <85D9D383-29A3-4F09-A2FE-61E4EA85CE9B@lakerest.net>
References:  <dffe84831001262336l1978797g8b12fab815f4eb52@mail.gmail.com>  <20100128.132114.1004138037722505681.imp@bsdimp.com> <dffe84831001281401n7c9fb64bjb38260943448f315@mail.gmail.com>  <66207A08-F691-4603-A6C5-9C675414C91E@lakerest.net> <eaa228be1001282040r416f3764lde577786347a4d5e@mail.gmail.com>  <85D9D383-29A3-4F09-A2FE-61E4EA85CE9B@lakerest.net>

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On Thu, Jan 28, 2010 at 21:28, Randall Stewart <rrs@lakerest.net> wrote:
>> [ Using a single wired TLB entry for kstack and pcpu ]
>
> Which means you have a big array that you are offsetting.

Not really =97 you can have a structure at 0xc000000000000000u (or the
same >> 32) with two pointers in it, even, one to pcpu and one to
KSTACK_PAGES direct-mapped, contiguous pages.  Then you can load the
kstack address or the pcpu base very quickly.  Of course, you can even
have a single wired entry consisting of the pcpu data and then put a
pointer to the top of the kstack in it.  I don't think you can get by
with no wired TLB entries, but you also don't have to index a big
array.  The nice thing about setting up a per-CPU TLB entry (you have
to set up at least one, the kstack, in order to be able to handle
exceptions) is that then you need only access offsets into it that are
known at compile time and constant no matter what CPU you're running
on.  Load the kstack by doing "ld sp, 0(0xc...)" and load the pcpu
address by doing "ld t0, 8(0xc....)".  Two wired entries lets you get
rid of the indirection, but you can get by with one and still not have
to do (1) run-time computation of the index into some array (2)
possibly very expensive getting of the cpuid.

> I was even thinking get a LARGE entry.. one that is say 8 Meg
> for the kernel.. covering all text/data etc... with this
> new super page stuff. of course I have never looked into how
> its implemented..

That would be easy to do, but what would be the benefits of accessing
that data through a wired TLB entry instead of the direct map?

> Yes, you pay an index reference for every access .. or at
> least one to setup a pointer.. but I think that it much cheaper
> than a TLB miss is... (words for imp to think about)...

Yes, TLB misses are very slow.  Your desire to avoid adding another
wired entry seems pretty reasonable.  I think that using a single
wired TLB entry for a mux or for both the kstack and pcpu is easy and
usable.  I feel like just wiring the kstack and putting a
direct-mapped, sometimes-recomputed pointer to the pcpu into gp is the
best combination in the long run =97 even just loading an immediate
64-bit address is pretty slow wrt how often things in the PCPU are
accessed in SMP kernels.

Juli.



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